Blob Blame History Raw
diff -Nrup a/bfd/elf.c b/bfd/elf.c
--- a/bfd/elf.c	2015-07-28 10:52:10.941754850 -0600
+++ b/bfd/elf.c	2015-07-28 10:53:34.725982912 -0600
@@ -4081,11 +4081,18 @@ _bfd_elf_map_sections_to_segments (bfd *
 	      new_segment = TRUE;
 	    }
 	  else if ((last_hdr->flags & (SEC_LOAD | SEC_THREAD_LOCAL)) == 0
-		   && (hdr->flags & (SEC_LOAD | SEC_THREAD_LOCAL)) != 0)
+		   && (hdr->flags & (SEC_LOAD | SEC_THREAD_LOCAL)) != 0
+		   && ((abfd->flags & D_PAGED) == 0
+		       || (((last_hdr->lma + last_size - 1) & -maxpagesize)
+			   != (hdr->lma & -maxpagesize))))
 	    {
-	      /* We don't want to put a loadable section after a
-		 nonloadable section in the same segment.
-		 Consider .tbss sections as loadable for this purpose.  */
+	      /* We don't want to put a loaded section after a
+		 nonloaded (ie. bss style) section in the same segment
+		 as that will force the non-loaded section to be loaded.
+		 Consider .tbss sections as loaded for this purpose.
+		 However, like the writable/non-writable case below,
+		 if they are on the same page then they must be put
+		 in the same segment.  */
 	      new_segment = TRUE;
 	    }
 	  else if ((abfd->flags & D_PAGED) == 0)
diff -Nrup a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d
--- a/ld/testsuite/ld-powerpc/elfv2so.d	2015-07-28 10:52:10.921755273 -0600
+++ b/ld/testsuite/ld-powerpc/elfv2so.d	2015-07-28 10:41:10.046732001 -0600
@@ -7,31 +7,31 @@
 
 Disassembly of section \.text:
 
-0+320 <.*\.plt_call\.f4>:
+0+300 <.*\.plt_call\.f4>:
 .*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
 .*:	(38 80 82 e9|e9 82 80 38) 	ld      r12,-32712\(r2\)
 .*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
 .*:	(20 04 80 4e|4e 80 04 20) 	bctr
 
-0+330 <.*\.plt_call\.f3>:
+0+310 <.*\.plt_call\.f3>:
 .*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
 .*:	(28 80 82 e9|e9 82 80 28) 	ld      r12,-32728\(r2\)
 .*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
 .*:	(20 04 80 4e|4e 80 04 20) 	bctr
 
-0+340 <.*\.plt_call\.f2>:
+0+320 <.*\.plt_call\.f2>:
 .*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
 .*:	(30 80 82 e9|e9 82 80 30) 	ld      r12,-32720\(r2\)
 .*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
 .*:	(20 04 80 4e|4e 80 04 20) 	bctr
 
-0+350 <.*\.plt_call\.f1>:
+0+330 <.*\.plt_call\.f1>:
 .*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
 .*:	(40 80 82 e9|e9 82 80 40) 	ld      r12,-32704\(r2\)
 .*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
 .*:	(20 04 80 4e|4e 80 04 20) 	bctr
 
-0+360 <f1>:
+0+340 <f1>:
 .*:	(02 00 4c 3c|3c 4c 00 02) 	addis   r2,r12,2
 .*:	(d8 81 42 38|38 42 81 d8) 	addi    r2,r2,-32296
 .*:	(a6 02 08 7c|7c 08 02 a6) 	mflr    r0
@@ -53,7 +53,7 @@ Disassembly of section \.text:
 .*:	(98 01 01 00|00 00 00 00) 	.*
 .*:	(00 00 00 00|00 01 01 98) 	.*
 
-0+3b0 <__glink_PLTresolve>:
+0+390 <__glink_PLTresolve>:
 .*:	(a6 02 08 7c|7c 08 02 a6) 	mflr    r0
 .*:	(05 00 9f 42|42 9f 00 05) 	bcl     .*
 .*:	(a6 02 68 7d|7d 68 02 a6) 	mflr    r11