From c68660ddc515651cf5eb21c4fbc8d4c4643921e1 Mon Sep 17 00:00:00 2001
From: David Gibson <dgibson@redhat.com>
Date: Thu, 27 Apr 2017 02:15:56 +0200
Subject: [PATCH 21/23] spapr: move spapr_populate_pa_features()
RH-Author: David Gibson <dgibson@redhat.com>
Message-id: <20170427021558.4884-6-dgibson@redhat.com>
Patchwork-id: 74918
O-Subject: [Pegas-1.0 qemu-kvm-rhev PATCH 5/7] spapr: move spapr_populate_pa_features()
Bugzilla: 1368786
RH-Acked-by: Thomas Huth <thuth@redhat.com>
RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
From: Sam Bobroff <sam.bobroff@au1.ibm.com>
In the next patch, spapr_fixup_cpu_dt() will need to call
spapr_populate_pa_features() so move it's definition up without making
any other changes.
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
(cherry picked from commit 86d5771a5ab67b72a0d830f0ac8c0420e18b48d8)
Siged-off-by: David Gibson <dgibson@redhat.com>
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
---
hw/ppc/spapr.c | 122 ++++++++++++++++++++++++++++-----------------------------
1 file changed, 61 insertions(+), 61 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 8b9f877..7376bb5 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -227,6 +227,67 @@ static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, CPUState *cs)
return ret;
}
+/* Populate the "ibm,pa-features" property */
+static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset)
+{
+ uint8_t pa_features_206[] = { 6, 0,
+ 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
+ uint8_t pa_features_207[] = { 24, 0,
+ 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
+ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
+ /* Currently we don't advertise any of the "new" ISAv3.00 functionality */
+ uint8_t pa_features_300[] = { 64, 0,
+ 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
+ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
+ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 24 - 29 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 - 35 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 36 - 41 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 - 47 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48 - 53 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 54 - 59 */
+ 0x00, 0x00, 0x00, 0x00 }; /* 60 - 63 */
+
+ uint8_t *pa_features;
+ size_t pa_size;
+
+ switch (POWERPC_MMU_VER(env->mmu_model)) {
+ case POWERPC_MMU_VER_2_06:
+ pa_features = pa_features_206;
+ pa_size = sizeof(pa_features_206);
+ break;
+ case POWERPC_MMU_VER_2_07:
+ pa_features = pa_features_207;
+ pa_size = sizeof(pa_features_207);
+ break;
+ case POWERPC_MMU_VER_3_00:
+ pa_features = pa_features_300;
+ pa_size = sizeof(pa_features_300);
+ break;
+ default:
+ return;
+ }
+
+ if (env->ci_large_pages) {
+ /*
+ * Note: we keep CI large pages off by default because a 64K capable
+ * guest provisioned with large pages might otherwise try to map a qemu
+ * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
+ * even if that qemu runs on a 4k host.
+ * We dd this bit back here if we are confident this is not an issue
+ */
+ pa_features[3] |= 0x20;
+ }
+ if (kvmppc_has_cap_htm() && pa_size > 24) {
+ pa_features[24] |= 0x80; /* Transactional memory support */
+ }
+
+ _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
+}
+
static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
{
int ret = 0, offset, cpus_offset;
@@ -379,67 +440,6 @@ static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
return 0;
}
-/* Populate the "ibm,pa-features" property */
-static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset)
-{
- uint8_t pa_features_206[] = { 6, 0,
- 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
- uint8_t pa_features_207[] = { 24, 0,
- 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
- 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
- 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
- /* Currently we don't advertise any of the "new" ISAv3.00 functionality */
- uint8_t pa_features_300[] = { 64, 0,
- 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
- 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
- 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
- 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 24 - 29 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 - 35 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 36 - 41 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 - 47 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48 - 53 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 54 - 59 */
- 0x00, 0x00, 0x00, 0x00 }; /* 60 - 63 */
-
- uint8_t *pa_features;
- size_t pa_size;
-
- switch (POWERPC_MMU_VER(env->mmu_model)) {
- case POWERPC_MMU_VER_2_06:
- pa_features = pa_features_206;
- pa_size = sizeof(pa_features_206);
- break;
- case POWERPC_MMU_VER_2_07:
- pa_features = pa_features_207;
- pa_size = sizeof(pa_features_207);
- break;
- case POWERPC_MMU_VER_3_00:
- pa_features = pa_features_300;
- pa_size = sizeof(pa_features_300);
- break;
- default:
- return;
- }
-
- if (env->ci_large_pages) {
- /*
- * Note: we keep CI large pages off by default because a 64K capable
- * guest provisioned with large pages might otherwise try to map a qemu
- * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
- * even if that qemu runs on a 4k host.
- * We dd this bit back here if we are confident this is not an issue
- */
- pa_features[3] |= 0x20;
- }
- if (kvmppc_has_cap_htm() && pa_size > 24) {
- pa_features[24] |= 0x80; /* Transactional memory support */
- }
-
- _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
-}
-
static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
sPAPRMachineState *spapr)
{
--
1.8.3.1