ac32bf
From 5662e5376adcc45da43d7818c8ac1882883c18ac Mon Sep 17 00:00:00 2001
ac32bf
From: Tyler Baicar <tbaicar@codeaurora.org>
ac32bf
Date: Tue, 12 Sep 2017 14:58:25 -0600
ac32bf
Subject: [PATCH 1/2] rasdaemon: add support for ARM events
ac32bf
ac32bf
Add support to handle the ARM kernel trace events
ac32bf
which cover RAS ARM processor errors.
ac32bf
ac32bf
[V4]: fix arm_event_tab usage
ac32bf
ac32bf
Change-Id: Ife99c97042498d5fad4d9b8e873ecfba6a47947d
ac32bf
Signed-off-by: Tyler Baicar <tbaicar@codeaurora.org>
ac32bf
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
ac32bf
---
ac32bf
 Makefile.am       |  3 ++
ac32bf
 configure.ac      |  9 ++++++
ac32bf
 ras-arm-handler.c | 90 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
ac32bf
 ras-arm-handler.h | 24 +++++++++++++++
ac32bf
 ras-events.c      | 15 ++++++++++
ac32bf
 ras-record.c      | 59 ++++++++++++++++++++++++++++++++++++
ac32bf
 ras-record.h      | 16 ++++++++++
ac32bf
 ras-report.c      | 75 ++++++++++++++++++++++++++++++++++++++++++++++
ac32bf
 ras-report.h      |  5 +++-
ac32bf
 9 files changed, 295 insertions(+), 1 deletion(-)
ac32bf
 create mode 100644 ras-arm-handler.c
ac32bf
 create mode 100644 ras-arm-handler.h
ac32bf
ac32bf
diff --git a/Makefile.am b/Makefile.am
ac32bf
index 2500772..4aa5543 100644
ac32bf
--- a/Makefile.am
ac32bf
+++ b/Makefile.am
ac32bf
@@ -27,6 +27,9 @@ endif
ac32bf
 if WITH_NON_STANDARD
ac32bf
    rasdaemon_SOURCES += ras-non-standard-handler.c
ac32bf
 endif
ac32bf
+if WITH_ARM
ac32bf
+   rasdaemon_SOURCES += ras-arm-handler.c
ac32bf
+endif
ac32bf
 if WITH_MCE
ac32bf
    rasdaemon_SOURCES += ras-mce-handler.c mce-intel.c mce-amd-k8.c \
ac32bf
 			mce-intel-p4-p6.c mce-intel-nehalem.c \
ac32bf
diff --git a/configure.ac b/configure.ac
ac32bf
index ecd4b2f..14fc2f2 100644
ac32bf
--- a/configure.ac
ac32bf
+++ b/configure.ac
ac32bf
@@ -53,6 +53,15 @@ AS_IF([test "x$enable_non_standard" = "xyes"], [
ac32bf
 ])
ac32bf
 AM_CONDITIONAL([WITH_NON_STANDARD], [test x$enable_non_standard = xyes])
ac32bf
 
ac32bf
+AC_ARG_ENABLE([arm],
ac32bf
+    AS_HELP_STRING([--enable-arm], [enable ARM events (currently experimental)]))
ac32bf
+
ac32bf
+AS_IF([test "x$enable_arm" = "xyes"], [
ac32bf
+  AC_DEFINE(HAVE_ARM,1,"have ARM events collect")
ac32bf
+  AC_SUBST([WITH_ARM])
ac32bf
+])
ac32bf
+AM_CONDITIONAL([WITH_ARM], [test x$enable_arm = xyes])
ac32bf
+
ac32bf
 AC_ARG_ENABLE([mce],
ac32bf
     AS_HELP_STRING([--enable-mce], [enable MCE events (currently experimental)]))
ac32bf
 
ac32bf
diff --git a/ras-arm-handler.c b/ras-arm-handler.c
ac32bf
new file mode 100644
ac32bf
index 0000000..a76470d
ac32bf
--- /dev/null
ac32bf
+++ b/ras-arm-handler.c
ac32bf
@@ -0,0 +1,90 @@
ac32bf
+/*
ac32bf
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
ac32bf
+ *
ac32bf
+ * This program is free software; you can redistribute it and/or modify
ac32bf
+ * it under the terms of the GNU General Public License version 2 and
ac32bf
+ * only version 2 as published by the Free Software Foundation.
ac32bf
+
ac32bf
+ * This program is distributed in the hope that it will be useful,
ac32bf
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
ac32bf
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
ac32bf
+ * GNU General Public License for more details.
ac32bf
+ */
ac32bf
+
ac32bf
+#include <stdio.h>
ac32bf
+#include <stdlib.h>
ac32bf
+#include <string.h>
ac32bf
+#include <unistd.h>
ac32bf
+#include "libtrace/kbuffer.h"
ac32bf
+#include "ras-arm-handler.h"
ac32bf
+#include "ras-record.h"
ac32bf
+#include "ras-logger.h"
ac32bf
+#include "ras-report.h"
ac32bf
+
ac32bf
+int ras_arm_event_handler(struct trace_seq *s,
ac32bf
+			 struct pevent_record *record,
ac32bf
+			 struct event_format *event, void *context)
ac32bf
+{
ac32bf
+	unsigned long long val;
ac32bf
+	struct ras_events *ras = context;
ac32bf
+	time_t now;
ac32bf
+	struct tm *tm;
ac32bf
+	struct ras_arm_event ev;
ac32bf
+
ac32bf
+	/*
ac32bf
+	 * Newer kernels (3.10-rc1 or upper) provide an uptime clock.
ac32bf
+	 * On previous kernels, the way to properly generate an event would
ac32bf
+	 * be to inject a fake one, measure its timestamp and diff it against
ac32bf
+	 * gettimeofday. We won't do it here. Instead, let's use uptime,
ac32bf
+	 * falling-back to the event report's time, if "uptime" clock is
ac32bf
+	 * not available (legacy kernels).
ac32bf
+	 */
ac32bf
+
ac32bf
+	if (ras->use_uptime)
ac32bf
+		now = record->ts/user_hz + ras->uptime_diff;
ac32bf
+	else
ac32bf
+		now = time(NULL);
ac32bf
+
ac32bf
+	tm = localtime(&now;;
ac32bf
+	if (tm)
ac32bf
+		strftime(ev.timestamp, sizeof(ev.timestamp),
ac32bf
+			 "%Y-%m-%d %H:%M:%S %z", tm);
ac32bf
+	trace_seq_printf(s, "%s\n", ev.timestamp);
ac32bf
+
ac32bf
+	if (pevent_get_field_val(s, event, "affinity", record, &val, 1) < 0)
ac32bf
+		return -1;
ac32bf
+	ev.affinity = val;
ac32bf
+	trace_seq_printf(s, " affinity: %d", ev.affinity);
ac32bf
+
ac32bf
+	if (pevent_get_field_val(s, event, "mpidr", record, &val, 1) < 0)
ac32bf
+		return -1;
ac32bf
+	ev.mpidr = val;
ac32bf
+	trace_seq_printf(s, "\n MPIDR: 0x%llx", (unsigned long long)ev.mpidr);
ac32bf
+
ac32bf
+	if (pevent_get_field_val(s, event, "midr", record, &val, 1) < 0)
ac32bf
+		return -1;
ac32bf
+	ev.midr = val;
ac32bf
+	trace_seq_printf(s, "\n MIDR: 0x%llx", (unsigned long long)ev.midr);
ac32bf
+
ac32bf
+	if (pevent_get_field_val(s, event, "running_state", record, &val, 1) < 0)
ac32bf
+		return -1;
ac32bf
+	ev.running_state = val;
ac32bf
+	trace_seq_printf(s, "\n running_state: %d", ev.running_state);
ac32bf
+
ac32bf
+	if (pevent_get_field_val(s, event, "psci_state", record, &val, 1) < 0)
ac32bf
+		return -1;
ac32bf
+	ev.psci_state = val;
ac32bf
+	trace_seq_printf(s, "\n psci_state: %d", ev.psci_state);
ac32bf
+
ac32bf
+	/* Insert data into the SGBD */
ac32bf
+#ifdef HAVE_SQLITE3
ac32bf
+	ras_store_arm_record(ras, &ev;;
ac32bf
+#endif
ac32bf
+
ac32bf
+#ifdef HAVE_ABRT_REPORT
ac32bf
+	/* Report event to ABRT */
ac32bf
+	ras_report_arm_event(ras, &ev;;
ac32bf
+#endif
ac32bf
+
ac32bf
+	return 0;
ac32bf
+}
ac32bf
diff --git a/ras-arm-handler.h b/ras-arm-handler.h
ac32bf
new file mode 100644
ac32bf
index 0000000..eae10ec
ac32bf
--- /dev/null
ac32bf
+++ b/ras-arm-handler.h
ac32bf
@@ -0,0 +1,24 @@
ac32bf
+/*
ac32bf
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
ac32bf
+ *
ac32bf
+ * This program is free software; you can redistribute it and/or modify
ac32bf
+ * it under the terms of the GNU General Public License version 2 and
ac32bf
+ * only version 2 as published by the Free Software Foundation.
ac32bf
+
ac32bf
+ * This program is distributed in the hope that it will be useful,
ac32bf
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
ac32bf
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
ac32bf
+ * GNU General Public License for more details.
ac32bf
+ */
ac32bf
+
ac32bf
+#ifndef __RAS_ARM_HANDLER_H
ac32bf
+#define __RAS_ARM_HANDLER_H
ac32bf
+
ac32bf
+#include "ras-events.h"
ac32bf
+#include "libtrace/event-parse.h"
ac32bf
+
ac32bf
+int ras_arm_event_handler(struct trace_seq *s,
ac32bf
+			 struct pevent_record *record,
ac32bf
+			 struct event_format *event, void *context);
ac32bf
+
ac32bf
+#endif
ac32bf
diff --git a/ras-events.c b/ras-events.c
ac32bf
index 96aa6f1..812d712 100644
ac32bf
--- a/ras-events.c
ac32bf
+++ b/ras-events.c
ac32bf
@@ -30,6 +30,7 @@
ac32bf
 #include "ras-mc-handler.h"
ac32bf
 #include "ras-aer-handler.h"
ac32bf
 #include "ras-non-standard-handler.h"
ac32bf
+#include "ras-arm-handler.h"
ac32bf
 #include "ras-mce-handler.h"
ac32bf
 #include "ras-extlog-handler.h"
ac32bf
 #include "ras-record.h"
ac32bf
@@ -213,6 +214,10 @@ int toggle_ras_mc_event(int enable)
ac32bf
 	rc |= __toggle_ras_mc_event(ras, "ras", "non_standard_event", enable);
ac32bf
 #endif
ac32bf
 
ac32bf
+#ifdef HAVE_ARM
ac32bf
+	rc |= __toggle_ras_mc_event(ras, "ras", "arm_event", enable);
ac32bf
+#endif
ac32bf
+
ac32bf
 free_ras:
ac32bf
 	free(ras);
ac32bf
 	return rc;
ac32bf
@@ -691,6 +696,16 @@ int handle_ras_events(int record_events)
ac32bf
                     "ras", "non_standard_event");
ac32bf
 #endif
ac32bf
 
ac32bf
+#ifdef HAVE_ARM
ac32bf
+        rc = add_event_handler(ras, pevent, page_size, "ras", "arm_event",
ac32bf
+                               ras_arm_event_handler);
ac32bf
+        if (!rc)
ac32bf
+                num_events++;
ac32bf
+        else
ac32bf
+                log(ALL, LOG_ERR, "Can't get traces from %s:%s\n",
ac32bf
+                    "ras", "arm_event");
ac32bf
+#endif
ac32bf
+
ac32bf
 	cpus = get_num_cpus(ras);
ac32bf
 
ac32bf
 #ifdef HAVE_MCE
ac32bf
diff --git a/ras-record.c b/ras-record.c
ac32bf
index 357ab61..c3644cb 100644
ac32bf
--- a/ras-record.c
ac32bf
+++ b/ras-record.c
ac32bf
@@ -209,6 +209,58 @@ int ras_store_non_standard_record(struct ras_events *ras, struct ras_non_standar
ac32bf
 }
ac32bf
 #endif
ac32bf
 
ac32bf
+/*
ac32bf
+ * Table and functions to handle ras:arm
ac32bf
+ */
ac32bf
+
ac32bf
+#ifdef HAVE_ARM
ac32bf
+static const struct db_fields arm_event_fields[] = {
ac32bf
+		{ .name="id",			.type="INTEGER PRIMARY KEY" },
ac32bf
+		{ .name="timestamp",		.type="TEXT" },
ac32bf
+		{ .name="error_count",		.type="INTEGER" },
ac32bf
+		{ .name="affinity",		.type="INTEGER" },
ac32bf
+		{ .name="mpidr",		.type="INTEGER" },
ac32bf
+		{ .name="running_state",	.type="INTEGER" },
ac32bf
+		{ .name="psci_state",		.type="INTEGER" },
ac32bf
+};
ac32bf
+
ac32bf
+static const struct db_table_descriptor arm_event_tab = {
ac32bf
+	.name = "arm_event",
ac32bf
+	.fields = arm_event_fields,
ac32bf
+	.num_fields = ARRAY_SIZE(arm_event_fields),
ac32bf
+};
ac32bf
+
ac32bf
+int ras_store_arm_record(struct ras_events *ras, struct ras_arm_event *ev)
ac32bf
+{
ac32bf
+	int rc;
ac32bf
+	struct sqlite3_priv *priv = ras->db_priv;
ac32bf
+
ac32bf
+	if (!priv || !priv->stmt_arm_record)
ac32bf
+		return 0;
ac32bf
+	log(TERM, LOG_INFO, "arm_event store: %p\n", priv->stmt_arm_record);
ac32bf
+
ac32bf
+	sqlite3_bind_text (priv->stmt_arm_record,  1,  ev->timestamp, -1, NULL);
ac32bf
+	sqlite3_bind_int  (priv->stmt_arm_record,  2,  ev->error_count);
ac32bf
+	sqlite3_bind_int  (priv->stmt_arm_record,  3,  ev->affinity);
ac32bf
+	sqlite3_bind_int  (priv->stmt_arm_record,  4,  ev->mpidr);
ac32bf
+	sqlite3_bind_int  (priv->stmt_arm_record,  5,  ev->running_state);
ac32bf
+	sqlite3_bind_int  (priv->stmt_arm_record,  6,  ev->psci_state);
ac32bf
+
ac32bf
+	rc = sqlite3_step(priv->stmt_arm_record);
ac32bf
+	if (rc != SQLITE_OK && rc != SQLITE_DONE)
ac32bf
+		log(TERM, LOG_ERR,
ac32bf
+		    "Failed to do arm_event step on sqlite: error = %d\n", rc);
ac32bf
+	rc = sqlite3_reset(priv->stmt_arm_record);
ac32bf
+	if (rc != SQLITE_OK && rc != SQLITE_DONE)
ac32bf
+		log(TERM, LOG_ERR,
ac32bf
+		    "Failed reset arm_event on sqlite: error = %d\n",
ac32bf
+		    rc);
ac32bf
+	log(TERM, LOG_INFO, "register inserted at db\n");
ac32bf
+
ac32bf
+	return rc;
ac32bf
+}
ac32bf
+#endif
ac32bf
+
ac32bf
 #ifdef HAVE_EXTLOG
ac32bf
 static const struct db_fields extlog_event_fields[] = {
ac32bf
 		{ .name="id",			.type="INTEGER PRIMARY KEY" },
ac32bf
@@ -509,6 +561,13 @@ int ras_mc_event_opendb(unsigned cpu, struct ras_events *ras)
ac32bf
 					&non_standard_event_tab);
ac32bf
 #endif
ac32bf
 
ac32bf
+#ifdef HAVE_ARM
ac32bf
+	rc = ras_mc_create_table(priv, &arm_event_tab);
ac32bf
+	if (rc == SQLITE_OK)
ac32bf
+		rc = ras_mc_prepare_stmt(priv, &priv->stmt_arm_record,
ac32bf
+					&arm_event_tab);
ac32bf
+#endif
ac32bf
+
ac32bf
 		ras->db_priv = priv;
ac32bf
 	return 0;
ac32bf
 }
ac32bf
diff --git a/ras-record.h b/ras-record.h
ac32bf
index 473ae40..12c2218 100644
ac32bf
--- a/ras-record.h
ac32bf
+++ b/ras-record.h
ac32bf
@@ -65,10 +65,21 @@ struct ras_non_standard_event {
ac32bf
 	uint32_t length;
ac32bf
 };
ac32bf
 
ac32bf
+struct ras_arm_event {
ac32bf
+	char timestamp[64];
ac32bf
+	int32_t error_count;
ac32bf
+	int8_t affinity;
ac32bf
+	int64_t mpidr;
ac32bf
+	int64_t midr;
ac32bf
+	int32_t running_state;
ac32bf
+	int32_t psci_state;
ac32bf
+};
ac32bf
+
ac32bf
 struct ras_mc_event;
ac32bf
 struct ras_aer_event;
ac32bf
 struct ras_extlog_event;
ac32bf
 struct ras_non_standard_event;
ac32bf
+struct ras_arm_event;
ac32bf
 struct mce_event;
ac32bf
 
ac32bf
 #ifdef HAVE_SQLITE3
ac32bf
@@ -90,6 +101,9 @@ struct sqlite3_priv {
ac32bf
 #ifdef HAVE_NON_STANDARD
ac32bf
 	sqlite3_stmt	*stmt_non_standard_record;
ac32bf
 #endif
ac32bf
+#ifdef HAVE_ARM
ac32bf
+	sqlite3_stmt	*stmt_arm_record;
ac32bf
+#endif
ac32bf
 };
ac32bf
 
ac32bf
 int ras_mc_event_opendb(unsigned cpu, struct ras_events *ras);
ac32bf
@@ -98,6 +112,7 @@ int ras_store_aer_event(struct ras_events *ras, struct ras_aer_event *ev);
ac32bf
 int ras_store_mce_record(struct ras_events *ras, struct mce_event *ev);
ac32bf
 int ras_store_extlog_mem_record(struct ras_events *ras, struct ras_extlog_event *ev);
ac32bf
 int ras_store_non_standard_record(struct ras_events *ras, struct ras_non_standard_event *ev);
ac32bf
+int ras_store_arm_record(struct ras_events *ras, struct ras_arm_event *ev);
ac32bf
 
ac32bf
 #else
ac32bf
 static inline int ras_mc_event_opendb(unsigned cpu, struct ras_events *ras) { return 0; };
ac32bf
@@ -106,6 +121,7 @@ static inline int ras_store_aer_event(struct ras_events *ras, struct ras_aer_eve
ac32bf
 static inline int ras_store_mce_record(struct ras_events *ras, struct mce_event *ev) { return 0; };
ac32bf
 static inline int ras_store_extlog_mem_record(struct ras_events *ras, struct ras_extlog_event *ev) { return 0; };
ac32bf
 static inline int ras_store_non_standard_record(struct ras_events *ras, struct ras_non_standard_event *ev) { return 0; };
ac32bf
+static inline int ras_store_arm_record(struct ras_events *ras, struct ras_arm_event *ev) { return 0; };
ac32bf
 
ac32bf
 #endif
ac32bf
 
ac32bf
diff --git a/ras-report.c b/ras-report.c
ac32bf
index 1eb9f79..d4beee0 100644
ac32bf
--- a/ras-report.c
ac32bf
+++ b/ras-report.c
ac32bf
@@ -228,6 +228,33 @@ static int set_non_standard_event_backtrace(char *buf, struct ras_non_standard_e
ac32bf
 	return 0;
ac32bf
 }
ac32bf
 
ac32bf
+static int set_arm_event_backtrace(char *buf, struct ras_arm_event *ev){
ac32bf
+	char bt_buf[MAX_BACKTRACE_SIZE];
ac32bf
+
ac32bf
+	if(!buf || !ev)
ac32bf
+		return -1;
ac32bf
+
ac32bf
+	sprintf(bt_buf, "BACKTRACE="    \
ac32bf
+						"timestamp=%s\n"	\
ac32bf
+						"error_count=%d\n"	\
ac32bf
+						"affinity=%d\n"	\
ac32bf
+						"mpidr=0x%lx\n"	\
ac32bf
+						"midr=0x%lx\n"	\
ac32bf
+						"running_state=%d\n"	\
ac32bf
+						"psci_state=%d\n",	\
ac32bf
+						ev->timestamp,	\
ac32bf
+						ev->error_count,	\
ac32bf
+						ev->affinity,	\
ac32bf
+						ev->mpidr,	\
ac32bf
+						ev->midr,	\
ac32bf
+						ev->running_state,	\
ac32bf
+						ev->psci_state);
ac32bf
+
ac32bf
+	strcat(buf, bt_buf);
ac32bf
+
ac32bf
+	return 0;
ac32bf
+}
ac32bf
+
ac32bf
 static int commit_report_backtrace(int sockfd, int type, void *ev){
ac32bf
 	char buf[MAX_BACKTRACE_SIZE];
ac32bf
 	char *pbuf = buf;
ac32bf
@@ -253,6 +280,9 @@ static int commit_report_backtrace(int sockfd, int type, void *ev){
ac32bf
 	case NON_STANDARD_EVENT:
ac32bf
 		rc = set_non_standard_event_backtrace(buf, (struct ras_non_standard_event *)ev);
ac32bf
 		break;
ac32bf
+	case ARM_EVENT:
ac32bf
+		rc = set_arm_event_backtrace(buf, (struct ras_arm_event *)ev);
ac32bf
+		break;
ac32bf
 	default:
ac32bf
 		return -1;
ac32bf
 	}
ac32bf
@@ -425,6 +455,51 @@ non_standard_fail:
ac32bf
 	return rc;
ac32bf
 }
ac32bf
 
ac32bf
+int ras_report_arm_event(struct ras_events *ras, struct ras_arm_event *ev){
ac32bf
+	char buf[MAX_MESSAGE_SIZE];
ac32bf
+	int sockfd = 0;
ac32bf
+	int rc = -1;
ac32bf
+
ac32bf
+	memset(buf, 0, sizeof(buf));
ac32bf
+
ac32bf
+	sockfd = setup_report_socket();
ac32bf
+	if(sockfd < 0){
ac32bf
+		return rc;
ac32bf
+	}
ac32bf
+
ac32bf
+	rc = commit_report_basic(sockfd);
ac32bf
+	if(rc < 0){
ac32bf
+		goto arm_fail;
ac32bf
+	}
ac32bf
+
ac32bf
+	rc = commit_report_backtrace(sockfd, ARM_EVENT, ev);
ac32bf
+	if(rc < 0){
ac32bf
+		goto arm_fail;
ac32bf
+	}
ac32bf
+
ac32bf
+	sprintf(buf, "ANALYZER=%s", "rasdaemon-arm");
ac32bf
+	rc = write(sockfd, buf, strlen(buf) + 1);
ac32bf
+	if(rc < strlen(buf) + 1){
ac32bf
+		goto arm_fail;
ac32bf
+	}
ac32bf
+
ac32bf
+	sprintf(buf, "REASON=%s", "ARM CPU report problem");
ac32bf
+	rc = write(sockfd, buf, strlen(buf) + 1);
ac32bf
+	if(rc < strlen(buf) + 1){
ac32bf
+		goto arm_fail;
ac32bf
+	}
ac32bf
+
ac32bf
+	rc = 0;
ac32bf
+
ac32bf
+arm_fail:
ac32bf
+
ac32bf
+	if(sockfd > 0){
ac32bf
+		close(sockfd);
ac32bf
+	}
ac32bf
+
ac32bf
+	return rc;
ac32bf
+}
ac32bf
+
ac32bf
 int ras_report_mce_event(struct ras_events *ras, struct mce_event *ev){
ac32bf
 	char buf[MAX_MESSAGE_SIZE];
ac32bf
 	int sockfd = 0;
ac32bf
diff --git a/ras-report.h b/ras-report.h
ac32bf
index c2fcf42..6c466f5 100644
ac32bf
--- a/ras-report.h
ac32bf
+++ b/ras-report.h
ac32bf
@@ -33,7 +33,8 @@ enum {
ac32bf
 	MC_EVENT,
ac32bf
 	MCE_EVENT,
ac32bf
 	AER_EVENT,
ac32bf
-	NON_STANDARD_EVENT
ac32bf
+	NON_STANDARD_EVENT,
ac32bf
+	ARM_EVENT
ac32bf
 };
ac32bf
 
ac32bf
 #ifdef HAVE_ABRT_REPORT
ac32bf
@@ -42,6 +43,7 @@ int ras_report_mc_event(struct ras_events *ras, struct ras_mc_event *ev);
ac32bf
 int ras_report_aer_event(struct ras_events *ras, struct ras_aer_event *ev);
ac32bf
 int ras_report_mce_event(struct ras_events *ras, struct mce_event *ev);
ac32bf
 int ras_report_non_standard_event(struct ras_events *ras, struct ras_non_standard_event *ev);
ac32bf
+int ras_report_arm_event(struct ras_events *ras, struct ras_arm_event *ev);
ac32bf
 
ac32bf
 #else
ac32bf
 
ac32bf
@@ -49,6 +51,7 @@ static inline int ras_report_mc_event(struct ras_events *ras, struct ras_mc_even
ac32bf
 static inline int ras_report_aer_event(struct ras_events *ras, struct ras_aer_event *ev) { return 0; };
ac32bf
 static inline int ras_report_mce_event(struct ras_events *ras, struct mce_event *ev) { return 0; };
ac32bf
 static inline int ras_report_non_standard_event(struct ras_events *ras, struct ras_non_standard_event *ev) { return 0; };
ac32bf
+static inline int ras_report_arm_event(struct ras_events *ras, struct ras_arm_event *ev) { return 0; };
ac32bf
 
ac32bf
 #endif
ac32bf
 
ac32bf
-- 
ac32bf
1.8.3.1
ac32bf