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From d233fc09d20fa24f6ee03f8505333d73f559eacf Mon Sep 17 00:00:00 2001
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Sun, 13 Sep 2015 23:03:44 +0200
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Subject: [PATCH 1/2] target-ppc: fix vcipher, vcipherlast, vncipherlast and
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vpermxor
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For vector instructions, the helpers get pointers to the vector register
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in arguments. Some operands might point to the same register, including
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the operand holding the result.
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When emulating instructions which access the vector elements in a
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non-linear way, we need to store the result in an temporary variable.
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This fixes openssl when emulating a POWER8 CPU.
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Cc: Tom Musta <tommusta@gmail.com>
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Cc: Alexander Graf <agraf@suse.de>
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Cc: qemu-stable@nongnu.org
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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---
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target-ppc/int_helper.c | 19 ++++++++++++++-----
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1 file changed, 14 insertions(+), 5 deletions(-)
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diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
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index 0a55d5e..b122868 100644
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--- a/target-ppc/int_helper.c
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+++ b/target-ppc/int_helper.c
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@@ -2327,24 +2327,28 @@ void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
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void helper_vcipher(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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{
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+ ppc_avr_t result;
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int i;
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VECTOR_FOR_INORDER_I(i, u32) {
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- r->AVRW(i) = b->AVRW(i) ^
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+ result.AVRW(i) = b->AVRW(i) ^
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(AES_Te0[a->AVRB(AES_shifts[4*i + 0])] ^
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AES_Te1[a->AVRB(AES_shifts[4*i + 1])] ^
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AES_Te2[a->AVRB(AES_shifts[4*i + 2])] ^
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AES_Te3[a->AVRB(AES_shifts[4*i + 3])]);
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}
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+ *r = result;
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}
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void helper_vcipherlast(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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{
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+ ppc_avr_t result;
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int i;
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VECTOR_FOR_INORDER_I(i, u8) {
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- r->AVRB(i) = b->AVRB(i) ^ (AES_sbox[a->AVRB(AES_shifts[i])]);
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+ result.AVRB(i) = b->AVRB(i) ^ (AES_sbox[a->AVRB(AES_shifts[i])]);
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}
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+ *r = result;
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}
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void helper_vncipher(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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@@ -2369,11 +2373,13 @@ void helper_vncipher(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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void helper_vncipherlast(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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{
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+ ppc_avr_t result;
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int i;
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VECTOR_FOR_INORDER_I(i, u8) {
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- r->AVRB(i) = b->AVRB(i) ^ (AES_isbox[a->AVRB(AES_ishifts[i])]);
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+ result.AVRB(i) = b->AVRB(i) ^ (AES_isbox[a->AVRB(AES_ishifts[i])]);
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}
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+ *r = result;
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}
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#define ROTRu32(v, n) (((v) >> (n)) | ((v) << (32-n)))
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@@ -2460,16 +2466,19 @@ void helper_vshasigmad(ppc_avr_t *r, ppc_avr_t *a, uint32_t st_six)
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void helper_vpermxor(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
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{
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+ ppc_avr_t result;
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int i;
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+
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VECTOR_FOR_INORDER_I(i, u8) {
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int indexA = c->u8[i] >> 4;
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int indexB = c->u8[i] & 0xF;
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#if defined(HOST_WORDS_BIGENDIAN)
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- r->u8[i] = a->u8[indexA] ^ b->u8[indexB];
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+ result.u8[i] = a->u8[indexA] ^ b->u8[indexB];
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#else
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- r->u8[i] = a->u8[15-indexA] ^ b->u8[15-indexB];
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+ result.u8[i] = a->u8[15-indexA] ^ b->u8[15-indexB];
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#endif
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}
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+ *r = result;
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}
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#undef VECTOR_FOR_INORDER_I
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--
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2.5.0
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