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From 1f97a7e017e09c60ca5b81062308cb951c5972a1 Mon Sep 17 00:00:00 2001
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From: "plai@redhat.com" <plai@redhat.com>
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b38b0f |
Date: Wed, 3 Apr 2019 15:54:31 +0100
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Subject: [PATCH 07/10] x86: Data structure changes to support MSR based
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b38b0f |
features
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RH-Author: plai@redhat.com
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Message-id: <1554306874-28796-8-git-send-email-plai@redhat.com>
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Patchwork-id: 85389
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O-Subject: [RHEL8.1 qemu-kvm PATCH resend 07/10] x86: Data structure changes to support MSR based features
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Bugzilla: 1561761
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
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From: Robert Hoo <robert.hu@linux.intel.com>
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69f3e1 |
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69f3e1 |
Add FeatureWordType indicator in struct FeatureWordInfo.
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Change feature_word_info[] accordingly.
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Change existing functions that refer to feature_word_info[] accordingly.
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Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
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Message-Id: <1539578845-37944-3-git-send-email-robert.hu@linux.intel.com>
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[ehabkost: fixed hvf_enabled() case]
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 07585923485952bf4cb7da563c9f91fecc85d09c)
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Signed-off-by: Paul Lai <plai@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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target/i386/cpu.c | 197 +++++++++++++++++++++++++++++++++++++++---------------
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1 file changed, 142 insertions(+), 55 deletions(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index d86b744..a0fdd3a 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -773,17 +773,36 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
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/* missing:
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CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */
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+typedef enum FeatureWordType {
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+ CPUID_FEATURE_WORD,
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+ MSR_FEATURE_WORD,
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+} FeatureWordType;
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+
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typedef struct FeatureWordInfo {
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+ FeatureWordType type;
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/* feature flags names are taken from "Intel Processor Identification and
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* the CPUID Instruction" and AMD's "CPUID Specification".
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* In cases of disagreement between feature naming conventions,
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* aliases may be added.
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*/
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const char *feat_names[32];
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- uint32_t cpuid_eax; /* Input EAX for CPUID */
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- bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */
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- uint32_t cpuid_ecx; /* Input ECX value for CPUID */
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- int cpuid_reg; /* output register (R_* constant) */
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+ union {
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+ /* If type==CPUID_FEATURE_WORD */
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+ struct {
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+ uint32_t eax; /* Input EAX for CPUID */
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+ bool needs_ecx; /* CPUID instruction uses ECX as input */
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+ uint32_t ecx; /* Input ECX value for CPUID */
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+ int reg; /* output register (R_* constant) */
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+ } cpuid;
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+ /* If type==MSR_FEATURE_WORD */
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+ struct {
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+ uint32_t index;
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+ struct { /*CPUID that enumerate this MSR*/
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+ FeatureWord cpuid_class;
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+ uint32_t cpuid_flag;
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+ } cpuid_dep;
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+ } msr;
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+ };
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uint32_t tcg_features; /* Feature flags supported by TCG */
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uint32_t unmigratable_flags; /* Feature flags known to be unmigratable */
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uint32_t migratable_flags; /* Feature flags known to be migratable */
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@@ -793,6 +812,7 @@ typedef struct FeatureWordInfo {
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static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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[FEAT_1_EDX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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"fpu", "vme", "de", "pse",
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"tsc", "msr", "pae", "mce",
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@@ -803,10 +823,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"fxsr", "sse", "sse2", "ss",
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"ht" /* Intel htt */, "tm", "ia64", "pbe",
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},
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- .cpuid_eax = 1, .cpuid_reg = R_EDX,
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+ .cpuid = {.eax = 1, .reg = R_EDX, },
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.tcg_features = TCG_FEATURES,
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},
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[FEAT_1_ECX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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"pni" /* Intel,AMD sse3 */, "pclmulqdq", "dtes64", "monitor",
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"ds-cpl", "vmx", "smx", "est",
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@@ -817,7 +838,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"tsc-deadline", "aes", "xsave", "osxsave",
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"avx", "f16c", "rdrand", "hypervisor",
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},
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- .cpuid_eax = 1, .cpuid_reg = R_ECX,
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+ .cpuid = { .eax = 1, .reg = R_ECX, },
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.tcg_features = TCG_EXT_FEATURES,
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},
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/* Feature names that are already defined on feature_name[] but
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@@ -826,6 +847,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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* to features[FEAT_8000_0001_EDX] if and only if CPU vendor is AMD.
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*/
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[FEAT_8000_0001_EDX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* fpu */, NULL /* vme */, NULL /* de */, NULL /* pse */,
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NULL /* tsc */, NULL /* msr */, NULL /* pae */, NULL /* mce */,
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@@ -836,10 +858,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL /* fxsr */, "fxsr-opt", "pdpe1gb", "rdtscp",
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NULL, "lm", "3dnowext", "3dnow",
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},
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- .cpuid_eax = 0x80000001, .cpuid_reg = R_EDX,
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+ .cpuid = { .eax = 0x80000001, .reg = R_EDX, },
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.tcg_features = TCG_EXT2_FEATURES,
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},
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[FEAT_8000_0001_ECX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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"lahf-lm", "cmp-legacy", "svm", "extapic",
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"cr8legacy", "abm", "sse4a", "misalignsse",
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@@ -850,7 +873,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"perfctr-nb", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = 0x80000001, .cpuid_reg = R_ECX,
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+ .cpuid = { .eax = 0x80000001, .reg = R_ECX, },
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.tcg_features = TCG_EXT3_FEATURES,
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/*
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* TOPOEXT is always allowed but can't be enabled blindly by
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@@ -860,6 +883,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.no_autoenable_flags = CPUID_EXT3_TOPOEXT,
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},
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[FEAT_C000_0001_EDX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL, NULL, "xstore", "xstore-en",
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NULL, NULL, "xcrypt", "xcrypt-en",
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@@ -870,10 +894,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = 0xC0000001, .cpuid_reg = R_EDX,
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+ .cpuid = { .eax = 0xC0000001, .reg = R_EDX, },
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.tcg_features = TCG_EXT4_FEATURES,
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},
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[FEAT_KVM] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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"kvmclock", "kvm-nopiodelay", "kvm-mmu", "kvmclock",
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"kvm-asyncpf", "kvm-steal-time", "kvm-pv-eoi", "kvm-pv-unhalt",
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@@ -884,10 +909,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"kvmclock-stable-bit", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = KVM_CPUID_FEATURES, .cpuid_reg = R_EAX,
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+ .cpuid = { .eax = KVM_CPUID_FEATURES, .reg = R_EAX, },
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.tcg_features = TCG_KVM_FEATURES,
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},
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[FEAT_KVM_HINTS] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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"kvm-hint-dedicated", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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@@ -898,7 +924,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = KVM_CPUID_FEATURES, .cpuid_reg = R_EDX,
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+ .cpuid = { .eax = KVM_CPUID_FEATURES, .reg = R_EDX, },
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.tcg_features = TCG_KVM_FEATURES,
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/*
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* KVM hints aren't auto-enabled by -cpu host, they need to be
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@@ -907,6 +933,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.no_autoenable_flags = ~0U,
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},
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[FEAT_HYPERV_EAX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* hv_msr_vp_runtime_access */, NULL /* hv_msr_time_refcount_access */,
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NULL /* hv_msr_synic_access */, NULL /* hv_msr_stimer_access */,
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@@ -920,9 +947,10 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = 0x40000003, .cpuid_reg = R_EAX,
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+ .cpuid = { .eax = 0x40000003, .reg = R_EAX, },
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},
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[FEAT_HYPERV_EBX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* hv_create_partitions */, NULL /* hv_access_partition_id */,
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NULL /* hv_access_memory_pool */, NULL /* hv_adjust_message_buffers */,
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@@ -936,9 +964,10 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = 0x40000003, .cpuid_reg = R_EBX,
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+ .cpuid = { .eax = 0x40000003, .reg = R_EBX, },
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},
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[FEAT_HYPERV_EDX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* hv_mwait */, NULL /* hv_guest_debugging */,
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NULL /* hv_perf_monitor */, NULL /* hv_cpu_dynamic_part */,
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@@ -951,9 +980,10 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = 0x40000003, .cpuid_reg = R_EDX,
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+ .cpuid = { .eax = 0x40000003, .reg = R_EDX, },
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},
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[FEAT_SVM] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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"npt", "lbrv", "svm-lock", "nrip-save",
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"tsc-scale", "vmcb-clean", "flushbyasid", "decodeassists",
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@@ -964,10 +994,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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- .cpuid_eax = 0x8000000A, .cpuid_reg = R_EDX,
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+ .cpuid = { .eax = 0x8000000A, .reg = R_EDX, },
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.tcg_features = TCG_SVM_FEATURES,
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},
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[FEAT_7_0_EBX] = {
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+ .type = CPUID_FEATURE_WORD,
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.feat_names = {
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"fsgsbase", "tsc-adjust", NULL, "bmi1",
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"hle", "avx2", NULL, "smep",
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69f3e1 |
@@ -978,12 +1009,15 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"clwb", "intel-pt", "avx512pf", "avx512er",
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69f3e1 |
"avx512cd", "sha-ni", "avx512bw", "avx512vl",
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},
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- .cpuid_eax = 7,
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- .cpuid_needs_ecx = true, .cpuid_ecx = 0,
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- .cpuid_reg = R_EBX,
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+ .cpuid = {
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+ .eax = 7,
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+ .needs_ecx = true, .ecx = 0,
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+ .reg = R_EBX,
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+ },
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|
69f3e1 |
.tcg_features = TCG_7_0_EBX_FEATURES,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_7_0_ECX] = {
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
.feat_names = {
|
|
|
69f3e1 |
NULL, "avx512vbmi", "umip", "pku",
|
|
|
69f3e1 |
"ospke", NULL, "avx512vbmi2", NULL,
|
|
|
69f3e1 |
@@ -994,12 +1028,15 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
- .cpuid_eax = 7,
|
|
|
69f3e1 |
- .cpuid_needs_ecx = true, .cpuid_ecx = 0,
|
|
|
69f3e1 |
- .cpuid_reg = R_ECX,
|
|
|
69f3e1 |
+ .cpuid = {
|
|
|
69f3e1 |
+ .eax = 7,
|
|
|
69f3e1 |
+ .needs_ecx = true, .ecx = 0,
|
|
|
69f3e1 |
+ .reg = R_ECX,
|
|
|
69f3e1 |
+ },
|
|
|
69f3e1 |
.tcg_features = TCG_7_0_ECX_FEATURES,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_7_0_EDX] = {
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
.feat_names = {
|
|
|
69f3e1 |
NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
@@ -1010,13 +1047,16 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
69f3e1 |
NULL, NULL, "spec-ctrl", "stibp",
|
|
|
69f3e1 |
NULL, "arch-capabilities", NULL, "ssbd",
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
- .cpuid_eax = 7,
|
|
|
69f3e1 |
- .cpuid_needs_ecx = true, .cpuid_ecx = 0,
|
|
|
69f3e1 |
- .cpuid_reg = R_EDX,
|
|
|
69f3e1 |
+ .cpuid = {
|
|
|
69f3e1 |
+ .eax = 7,
|
|
|
69f3e1 |
+ .needs_ecx = true, .ecx = 0,
|
|
|
69f3e1 |
+ .reg = R_EDX,
|
|
|
69f3e1 |
+ },
|
|
|
69f3e1 |
.tcg_features = TCG_7_0_EDX_FEATURES,
|
|
|
69f3e1 |
.unmigratable_flags = CPUID_7_0_EDX_ARCH_CAPABILITIES,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_8000_0007_EDX] = {
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
.feat_names = {
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
@@ -1027,12 +1067,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
- .cpuid_eax = 0x80000007,
|
|
|
69f3e1 |
- .cpuid_reg = R_EDX,
|
|
|
69f3e1 |
+ .cpuid = { .eax = 0x80000007, .reg = R_EDX, },
|
|
|
69f3e1 |
.tcg_features = TCG_APM_FEATURES,
|
|
|
69f3e1 |
.unmigratable_flags = CPUID_APM_INVTSC,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_8000_0008_EBX] = {
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
.feat_names = {
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
@@ -1043,12 +1083,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
69f3e1 |
NULL, "virt-ssbd", NULL, NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
- .cpuid_eax = 0x80000008,
|
|
|
69f3e1 |
- .cpuid_reg = R_EBX,
|
|
|
69f3e1 |
+ .cpuid = { .eax = 0x80000008, .reg = R_EBX, },
|
|
|
69f3e1 |
.tcg_features = 0,
|
|
|
69f3e1 |
.unmigratable_flags = 0,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_XSAVE] = {
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
.feat_names = {
|
|
|
69f3e1 |
"xsaveopt", "xsavec", "xgetbv1", "xsaves",
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
@@ -1059,12 +1099,15 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
- .cpuid_eax = 0xd,
|
|
|
69f3e1 |
- .cpuid_needs_ecx = true, .cpuid_ecx = 1,
|
|
|
69f3e1 |
- .cpuid_reg = R_EAX,
|
|
|
69f3e1 |
+ .cpuid = {
|
|
|
69f3e1 |
+ .eax = 0xd,
|
|
|
69f3e1 |
+ .needs_ecx = true, .ecx = 1,
|
|
|
69f3e1 |
+ .reg = R_EAX,
|
|
|
69f3e1 |
+ },
|
|
|
69f3e1 |
.tcg_features = TCG_XSAVE_FEATURES,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_6_EAX] = {
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
.feat_names = {
|
|
|
69f3e1 |
NULL, NULL, "arat", NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
@@ -1075,13 +1118,16 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
NULL, NULL, NULL, NULL,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
- .cpuid_eax = 6, .cpuid_reg = R_EAX,
|
|
|
69f3e1 |
+ .cpuid = { .eax = 6, .reg = R_EAX, },
|
|
|
69f3e1 |
.tcg_features = TCG_6_EAX_FEATURES,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_XSAVE_COMP_LO] = {
|
|
|
69f3e1 |
- .cpuid_eax = 0xD,
|
|
|
69f3e1 |
- .cpuid_needs_ecx = true, .cpuid_ecx = 0,
|
|
|
69f3e1 |
- .cpuid_reg = R_EAX,
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
+ .cpuid = {
|
|
|
69f3e1 |
+ .eax = 0xD,
|
|
|
69f3e1 |
+ .needs_ecx = true, .ecx = 0,
|
|
|
69f3e1 |
+ .reg = R_EAX,
|
|
|
69f3e1 |
+ },
|
|
|
69f3e1 |
.tcg_features = ~0U,
|
|
|
69f3e1 |
.migratable_flags = XSTATE_FP_MASK | XSTATE_SSE_MASK |
|
|
|
69f3e1 |
XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
|
|
|
69f3e1 |
@@ -1089,9 +1135,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
69f3e1 |
XSTATE_PKRU_MASK,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
[FEAT_XSAVE_COMP_HI] = {
|
|
|
69f3e1 |
- .cpuid_eax = 0xD,
|
|
|
69f3e1 |
- .cpuid_needs_ecx = true, .cpuid_ecx = 0,
|
|
|
69f3e1 |
- .cpuid_reg = R_EDX,
|
|
|
69f3e1 |
+ .type = CPUID_FEATURE_WORD,
|
|
|
69f3e1 |
+ .cpuid = {
|
|
|
69f3e1 |
+ .eax = 0xD,
|
|
|
69f3e1 |
+ .needs_ecx = true, .ecx = 0,
|
|
|
69f3e1 |
+ .reg = R_EDX,
|
|
|
69f3e1 |
+ },
|
|
|
69f3e1 |
.tcg_features = ~0U,
|
|
|
69f3e1 |
},
|
|
|
69f3e1 |
};
|
|
|
b38b0f |
@@ -2961,21 +3010,41 @@ static const TypeInfo host_x86_cpu_type_info = {
|
|
|
69f3e1 |
|
|
|
69f3e1 |
#endif
|
|
|
69f3e1 |
|
|
|
69f3e1 |
+static char *feature_word_description(FeatureWordInfo *f, uint32_t bit)
|
|
|
69f3e1 |
+{
|
|
|
69f3e1 |
+ assert(f->type == CPUID_FEATURE_WORD || f->type == MSR_FEATURE_WORD);
|
|
|
69f3e1 |
+
|
|
|
69f3e1 |
+ switch (f->type) {
|
|
|
69f3e1 |
+ case CPUID_FEATURE_WORD:
|
|
|
69f3e1 |
+ {
|
|
|
69f3e1 |
+ const char *reg = get_register_name_32(f->cpuid.reg);
|
|
|
69f3e1 |
+ assert(reg);
|
|
|
69f3e1 |
+ return g_strdup_printf("CPUID.%02XH:%s",
|
|
|
69f3e1 |
+ f->cpuid.eax, reg);
|
|
|
69f3e1 |
+ }
|
|
|
69f3e1 |
+ case MSR_FEATURE_WORD:
|
|
|
69f3e1 |
+ return g_strdup_printf("MSR(%02XH)",
|
|
|
69f3e1 |
+ f->msr.index);
|
|
|
69f3e1 |
+ }
|
|
|
69f3e1 |
+
|
|
|
69f3e1 |
+ return NULL;
|
|
|
69f3e1 |
+}
|
|
|
69f3e1 |
+
|
|
|
69f3e1 |
static void report_unavailable_features(FeatureWord w, uint32_t mask)
|
|
|
69f3e1 |
{
|
|
|
69f3e1 |
FeatureWordInfo *f = &feature_word_info[w];
|
|
|
69f3e1 |
int i;
|
|
|
69f3e1 |
+ char *feat_word_str;
|
|
|
69f3e1 |
|
|
|
69f3e1 |
for (i = 0; i < 32; ++i) {
|
|
|
69f3e1 |
if ((1UL << i) & mask) {
|
|
|
69f3e1 |
- const char *reg = get_register_name_32(f->cpuid_reg);
|
|
|
69f3e1 |
- assert(reg);
|
|
|
69f3e1 |
- warn_report("%s doesn't support requested feature: "
|
|
|
69f3e1 |
- "CPUID.%02XH:%s%s%s [bit %d]",
|
|
|
69f3e1 |
+ feat_word_str = feature_word_description(f, i);
|
|
|
69f3e1 |
+ warn_report("%s doesn't support requested feature: %s%s%s [bit %d]",
|
|
|
69f3e1 |
accel_uses_host_cpuid() ? "host" : "TCG",
|
|
|
69f3e1 |
- f->cpuid_eax, reg,
|
|
|
69f3e1 |
+ feat_word_str,
|
|
|
69f3e1 |
f->feat_names[i] ? "." : "",
|
|
|
69f3e1 |
f->feat_names[i] ? f->feat_names[i] : "", i);
|
|
|
69f3e1 |
+ g_free(feat_word_str);
|
|
|
69f3e1 |
}
|
|
|
69f3e1 |
}
|
|
|
69f3e1 |
}
|
|
|
b38b0f |
@@ -3219,11 +3288,18 @@ static void x86_cpu_get_feature_words(Object *obj, Visitor *v,
|
|
|
69f3e1 |
|
|
|
69f3e1 |
for (w = 0; w < FEATURE_WORDS; w++) {
|
|
|
69f3e1 |
FeatureWordInfo *wi = &feature_word_info[w];
|
|
|
69f3e1 |
+ /*
|
|
|
69f3e1 |
+ * We didn't have MSR features when "feature-words" was
|
|
|
69f3e1 |
+ * introduced. Therefore skipped other type entries.
|
|
|
69f3e1 |
+ */
|
|
|
69f3e1 |
+ if (wi->type != CPUID_FEATURE_WORD) {
|
|
|
69f3e1 |
+ continue;
|
|
|
69f3e1 |
+ }
|
|
|
69f3e1 |
X86CPUFeatureWordInfo *qwi = &word_infos[w];
|
|
|
69f3e1 |
- qwi->cpuid_input_eax = wi->cpuid_eax;
|
|
|
69f3e1 |
- qwi->has_cpuid_input_ecx = wi->cpuid_needs_ecx;
|
|
|
69f3e1 |
- qwi->cpuid_input_ecx = wi->cpuid_ecx;
|
|
|
69f3e1 |
- qwi->cpuid_register = x86_reg_info_32[wi->cpuid_reg].qapi_enum;
|
|
|
69f3e1 |
+ qwi->cpuid_input_eax = wi->cpuid.eax;
|
|
|
69f3e1 |
+ qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;
|
|
|
69f3e1 |
+ qwi->cpuid_input_ecx = wi->cpuid.ecx;
|
|
|
69f3e1 |
+ qwi->cpuid_register = x86_reg_info_32[wi->cpuid.reg].qapi_enum;
|
|
|
69f3e1 |
qwi->features = array[w];
|
|
|
69f3e1 |
|
|
|
69f3e1 |
/* List will be in reverse order, but order shouldn't matter */
|
|
|
b38b0f |
@@ -3579,16 +3655,26 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w,
|
|
|
69f3e1 |
bool migratable_only)
|
|
|
69f3e1 |
{
|
|
|
69f3e1 |
FeatureWordInfo *wi = &feature_word_info[w];
|
|
|
69f3e1 |
- uint32_t r;
|
|
|
69f3e1 |
+ uint32_t r = 0;
|
|
|
69f3e1 |
|
|
|
69f3e1 |
if (kvm_enabled()) {
|
|
|
69f3e1 |
- r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid_eax,
|
|
|
69f3e1 |
- wi->cpuid_ecx,
|
|
|
69f3e1 |
- wi->cpuid_reg);
|
|
|
69f3e1 |
+ switch (wi->type) {
|
|
|
69f3e1 |
+ case CPUID_FEATURE_WORD:
|
|
|
69f3e1 |
+ r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid.eax,
|
|
|
69f3e1 |
+ wi->cpuid.ecx,
|
|
|
69f3e1 |
+ wi->cpuid.reg);
|
|
|
69f3e1 |
+ break;
|
|
|
69f3e1 |
+ case MSR_FEATURE_WORD:
|
|
|
69f3e1 |
+ r = kvm_arch_get_supported_msr_feature(kvm_state, wi->msr.index);
|
|
|
69f3e1 |
+ break;
|
|
|
69f3e1 |
+ }
|
|
|
69f3e1 |
} else if (hvf_enabled()) {
|
|
|
69f3e1 |
- r = hvf_get_supported_cpuid(wi->cpuid_eax,
|
|
|
69f3e1 |
- wi->cpuid_ecx,
|
|
|
69f3e1 |
- wi->cpuid_reg);
|
|
|
69f3e1 |
+ if (wi->type != CPUID_FEATURE_WORD) {
|
|
|
69f3e1 |
+ return 0;
|
|
|
69f3e1 |
+ }
|
|
|
69f3e1 |
+ r = hvf_get_supported_cpuid(wi->cpuid.eax,
|
|
|
69f3e1 |
+ wi->cpuid.ecx,
|
|
|
69f3e1 |
+ wi->cpuid.reg);
|
|
|
69f3e1 |
} else if (tcg_enabled()) {
|
|
|
69f3e1 |
r = wi->tcg_features;
|
|
|
69f3e1 |
} else {
|
|
|
b38b0f |
@@ -4649,9 +4735,10 @@ static void x86_cpu_adjust_feat_level(X86CPU *cpu, FeatureWord w)
|
|
|
69f3e1 |
{
|
|
|
69f3e1 |
CPUX86State *env = &cpu->env;
|
|
|
69f3e1 |
FeatureWordInfo *fi = &feature_word_info[w];
|
|
|
69f3e1 |
- uint32_t eax = fi->cpuid_eax;
|
|
|
69f3e1 |
+ uint32_t eax = fi->cpuid.eax;
|
|
|
69f3e1 |
uint32_t region = eax & 0xF0000000;
|
|
|
69f3e1 |
|
|
|
69f3e1 |
+ assert(feature_word_info[w].type == CPUID_FEATURE_WORD);
|
|
|
69f3e1 |
if (!env->features[w]) {
|
|
|
69f3e1 |
return;
|
|
|
69f3e1 |
}
|
|
|
69f3e1 |
--
|
|
|
69f3e1 |
1.8.3.1
|
|
|
69f3e1 |
|