|
 |
016a62 |
From 07cb338d84e4f439b0a62fbdcbe2162936e3728a Mon Sep 17 00:00:00 2001
|
|
|
016a62 |
From: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
016a62 |
Date: Fri, 22 Nov 2019 11:53:38 +0000
|
|
|
016a62 |
Subject: [PATCH 05/16] target-i386: kvm: 'kvm_get_supported_msrs' cleanup
|
|
|
016a62 |
|
|
|
016a62 |
RH-Author: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
016a62 |
Message-id: <20191122115348.25000-6-pbonzini@redhat.com>
|
|
|
016a62 |
Patchwork-id: 92606
|
|
|
016a62 |
O-Subject: [RHEL8.2/rhel qemu-kvm PATCH 05/15] target-i386: kvm: 'kvm_get_supported_msrs' cleanup
|
|
|
016a62 |
Bugzilla: 1689270
|
|
|
016a62 |
RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
|
|
|
016a62 |
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
016a62 |
RH-Acked-by: Maxim Levitsky <mlevitsk@redhat.com>
|
|
|
016a62 |
|
|
|
016a62 |
From: Li Qiang <liq3ea@163.com>
|
|
|
016a62 |
|
|
|
016a62 |
Function 'kvm_get_supported_msrs' is only called once
|
|
|
016a62 |
now, get rid of the static variable 'kvm_supported_msrs'.
|
|
|
016a62 |
|
|
|
016a62 |
Signed-off-by: Li Qiang <liq3ea@163.com>
|
|
|
016a62 |
Message-Id: <20190725151639.21693-1-liq3ea@163.com>
|
|
|
016a62 |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
016a62 |
(cherry picked from commit de428cead63a958137ee63efcc3cceaf75f6c125)
|
|
|
016a62 |
|
|
|
016a62 |
RHEL: no HV_X64_MSR_REENLIGHTENMENT_CONTROL
|
|
|
016a62 |
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
|
|
|
016a62 |
---
|
|
|
016a62 |
target/i386/kvm.c | 179 +++++++++++++++++++++++++++---------------------------
|
|
|
016a62 |
1 file changed, 88 insertions(+), 91 deletions(-)
|
|
|
016a62 |
|
|
|
016a62 |
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
|
|
|
016a62 |
index 849a11a..2290c5d 100644
|
|
|
016a62 |
--- a/target/i386/kvm.c
|
|
|
016a62 |
+++ b/target/i386/kvm.c
|
|
|
016a62 |
@@ -1340,105 +1340,102 @@ static int kvm_get_supported_feature_msrs(KVMState *s)
|
|
|
016a62 |
|
|
|
016a62 |
static int kvm_get_supported_msrs(KVMState *s)
|
|
|
016a62 |
{
|
|
|
016a62 |
- static int kvm_supported_msrs;
|
|
|
016a62 |
int ret = 0;
|
|
|
016a62 |
+ struct kvm_msr_list msr_list, *kvm_msr_list;
|
|
|
016a62 |
|
|
|
016a62 |
- /* first time */
|
|
|
016a62 |
- if (kvm_supported_msrs == 0) {
|
|
|
016a62 |
- struct kvm_msr_list msr_list, *kvm_msr_list;
|
|
|
016a62 |
+ /*
|
|
|
016a62 |
+ * Obtain MSR list from KVM. These are the MSRs that we must
|
|
|
016a62 |
+ * save/restore.
|
|
|
016a62 |
+ */
|
|
|
016a62 |
+ msr_list.nmsrs = 0;
|
|
|
016a62 |
+ ret = kvm_ioctl(s, KVM_GET_MSR_INDEX_LIST, &msr_list);
|
|
|
016a62 |
+ if (ret < 0 && ret != -E2BIG) {
|
|
|
016a62 |
+ return ret;
|
|
|
016a62 |
+ }
|
|
|
016a62 |
+ /*
|
|
|
016a62 |
+ * Old kernel modules had a bug and could write beyond the provided
|
|
|
016a62 |
+ * memory. Allocate at least a safe amount of 1K.
|
|
|
016a62 |
+ */
|
|
|
016a62 |
+ kvm_msr_list = g_malloc0(MAX(1024, sizeof(msr_list) +
|
|
|
016a62 |
+ msr_list.nmsrs *
|
|
|
016a62 |
+ sizeof(msr_list.indices[0])));
|
|
|
016a62 |
|
|
|
016a62 |
- kvm_supported_msrs = -1;
|
|
|
016a62 |
+ kvm_msr_list->nmsrs = msr_list.nmsrs;
|
|
|
016a62 |
+ ret = kvm_ioctl(s, KVM_GET_MSR_INDEX_LIST, kvm_msr_list);
|
|
|
016a62 |
+ if (ret >= 0) {
|
|
|
016a62 |
+ int i;
|
|
|
016a62 |
|
|
|
016a62 |
- /* Obtain MSR list from KVM. These are the MSRs that we must
|
|
|
016a62 |
- * save/restore */
|
|
|
016a62 |
- msr_list.nmsrs = 0;
|
|
|
016a62 |
- ret = kvm_ioctl(s, KVM_GET_MSR_INDEX_LIST, &msr_list);
|
|
|
016a62 |
- if (ret < 0 && ret != -E2BIG) {
|
|
|
016a62 |
- return ret;
|
|
|
016a62 |
- }
|
|
|
016a62 |
- /* Old kernel modules had a bug and could write beyond the provided
|
|
|
016a62 |
- memory. Allocate at least a safe amount of 1K. */
|
|
|
016a62 |
- kvm_msr_list = g_malloc0(MAX(1024, sizeof(msr_list) +
|
|
|
016a62 |
- msr_list.nmsrs *
|
|
|
016a62 |
- sizeof(msr_list.indices[0])));
|
|
|
016a62 |
-
|
|
|
016a62 |
- kvm_msr_list->nmsrs = msr_list.nmsrs;
|
|
|
016a62 |
- ret = kvm_ioctl(s, KVM_GET_MSR_INDEX_LIST, kvm_msr_list);
|
|
|
016a62 |
- if (ret >= 0) {
|
|
|
016a62 |
- int i;
|
|
|
016a62 |
-
|
|
|
016a62 |
- for (i = 0; i < kvm_msr_list->nmsrs; i++) {
|
|
|
016a62 |
- switch (kvm_msr_list->indices[i]) {
|
|
|
016a62 |
- case MSR_STAR:
|
|
|
016a62 |
- has_msr_star = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_VM_HSAVE_PA:
|
|
|
016a62 |
- has_msr_hsave_pa = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_TSC_AUX:
|
|
|
016a62 |
- has_msr_tsc_aux = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_TSC_ADJUST:
|
|
|
016a62 |
- has_msr_tsc_adjust = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_TSCDEADLINE:
|
|
|
016a62 |
- has_msr_tsc_deadline = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_SMBASE:
|
|
|
016a62 |
- has_msr_smbase = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_SMI_COUNT:
|
|
|
016a62 |
- has_msr_smi_count = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_MISC_ENABLE:
|
|
|
016a62 |
- has_msr_misc_enable = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_BNDCFGS:
|
|
|
016a62 |
- has_msr_bndcfgs = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_XSS:
|
|
|
016a62 |
- has_msr_xss = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case HV_X64_MSR_CRASH_CTL:
|
|
|
016a62 |
- has_msr_hv_crash = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case HV_X64_MSR_RESET:
|
|
|
016a62 |
- has_msr_hv_reset = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case HV_X64_MSR_VP_INDEX:
|
|
|
016a62 |
- has_msr_hv_vpindex = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case HV_X64_MSR_VP_RUNTIME:
|
|
|
016a62 |
- has_msr_hv_runtime = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case HV_X64_MSR_SCONTROL:
|
|
|
016a62 |
- has_msr_hv_synic = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case HV_X64_MSR_STIMER0_CONFIG:
|
|
|
016a62 |
- has_msr_hv_stimer = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case HV_X64_MSR_TSC_FREQUENCY:
|
|
|
016a62 |
- has_msr_hv_frequencies = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_SPEC_CTRL:
|
|
|
016a62 |
- has_msr_spec_ctrl = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_VIRT_SSBD:
|
|
|
016a62 |
- has_msr_virt_ssbd = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_ARCH_CAPABILITIES:
|
|
|
016a62 |
- has_msr_arch_capabs = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- case MSR_IA32_CORE_CAPABILITY:
|
|
|
016a62 |
- has_msr_core_capabs = true;
|
|
|
016a62 |
- break;
|
|
|
016a62 |
- }
|
|
|
016a62 |
+ for (i = 0; i < kvm_msr_list->nmsrs; i++) {
|
|
|
016a62 |
+ switch (kvm_msr_list->indices[i]) {
|
|
|
016a62 |
+ case MSR_STAR:
|
|
|
016a62 |
+ has_msr_star = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_VM_HSAVE_PA:
|
|
|
016a62 |
+ has_msr_hsave_pa = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_TSC_AUX:
|
|
|
016a62 |
+ has_msr_tsc_aux = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_TSC_ADJUST:
|
|
|
016a62 |
+ has_msr_tsc_adjust = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_TSCDEADLINE:
|
|
|
016a62 |
+ has_msr_tsc_deadline = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_SMBASE:
|
|
|
016a62 |
+ has_msr_smbase = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_SMI_COUNT:
|
|
|
016a62 |
+ has_msr_smi_count = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_MISC_ENABLE:
|
|
|
016a62 |
+ has_msr_misc_enable = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_BNDCFGS:
|
|
|
016a62 |
+ has_msr_bndcfgs = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_XSS:
|
|
|
016a62 |
+ has_msr_xss = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case HV_X64_MSR_CRASH_CTL:
|
|
|
016a62 |
+ has_msr_hv_crash = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case HV_X64_MSR_RESET:
|
|
|
016a62 |
+ has_msr_hv_reset = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case HV_X64_MSR_VP_INDEX:
|
|
|
016a62 |
+ has_msr_hv_vpindex = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case HV_X64_MSR_VP_RUNTIME:
|
|
|
016a62 |
+ has_msr_hv_runtime = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case HV_X64_MSR_SCONTROL:
|
|
|
016a62 |
+ has_msr_hv_synic = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case HV_X64_MSR_STIMER0_CONFIG:
|
|
|
016a62 |
+ has_msr_hv_stimer = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case HV_X64_MSR_TSC_FREQUENCY:
|
|
|
016a62 |
+ has_msr_hv_frequencies = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_SPEC_CTRL:
|
|
|
016a62 |
+ has_msr_spec_ctrl = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_VIRT_SSBD:
|
|
|
016a62 |
+ has_msr_virt_ssbd = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_ARCH_CAPABILITIES:
|
|
|
016a62 |
+ has_msr_arch_capabs = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
+ case MSR_IA32_CORE_CAPABILITY:
|
|
|
016a62 |
+ has_msr_core_capabs = true;
|
|
|
016a62 |
+ break;
|
|
|
016a62 |
}
|
|
|
016a62 |
}
|
|
|
016a62 |
-
|
|
|
016a62 |
- g_free(kvm_msr_list);
|
|
|
016a62 |
}
|
|
|
016a62 |
|
|
|
016a62 |
+ g_free(kvm_msr_list);
|
|
|
016a62 |
+
|
|
|
016a62 |
return ret;
|
|
|
016a62 |
}
|
|
|
016a62 |
|
|
|
016a62 |
--
|
|
|
016a62 |
1.8.3.1
|
|
|
016a62 |
|