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From 15a2a3aa1c4eb2c3abac569a120714425b64864d Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Thu, 26 Jul 2018 17:18:56 +0100
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Subject: [PATCH 06/14] i386: Initialize cache information for EPYC family
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processors
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <20180726171904.27418-4-ehabkost@redhat.com>
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Patchwork-id: 81527
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O-Subject: [qemu-kvm RHEL8/virt212 PATCH v2 03/11] i386: Initialize cache information for EPYC family processors
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Bugzilla: 1597739
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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From: Babu Moger <babu.moger@amd.com>
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Initialize pre-determined cache information for EPYC processors.
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Signed-off-by: Babu Moger <babu.moger@amd.com>
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Tested-by: Geoffrey McRae <geoff@hostfission.com>
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Message-Id: <20180510204148.11687-5-babu.moger@amd.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit fe52acd2a054b97765963a42037f2f886545e30c)
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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target/i386/cpu.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 52 insertions(+)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 50af741..bd0abc2 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1108,6 +1108,56 @@ struct X86CPUDefinition {
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CPUCaches *cache_info;
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};
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+static CPUCaches epyc_cache_info = {
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+ .l1d_cache = {
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+ .type = DCACHE,
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+ .level = 1,
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+ .size = 32 * KiB,
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+ .line_size = 64,
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+ .associativity = 8,
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+ .partitions = 1,
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+ .sets = 64,
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+ .lines_per_tag = 1,
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+ .self_init = 1,
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+ .no_invd_sharing = true,
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+ },
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+ .l1i_cache = {
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+ .type = ICACHE,
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+ .level = 1,
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+ .size = 64 * KiB,
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+ .line_size = 64,
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+ .associativity = 4,
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+ .partitions = 1,
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+ .sets = 256,
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+ .lines_per_tag = 1,
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+ .self_init = 1,
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+ .no_invd_sharing = true,
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+ },
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+ .l2_cache = {
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+ .type = UNIFIED_CACHE,
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+ .level = 2,
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+ .size = 512 * KiB,
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+ .line_size = 64,
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+ .associativity = 8,
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+ .partitions = 1,
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+ .sets = 1024,
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+ .lines_per_tag = 1,
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+ },
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+ .l3_cache = {
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+ .type = UNIFIED_CACHE,
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+ .level = 3,
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+ .size = 8 * MiB,
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+ .line_size = 64,
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+ .associativity = 16,
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+ .partitions = 1,
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+ .sets = 8192,
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+ .lines_per_tag = 1,
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+ .self_init = true,
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+ .inclusive = true,
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+ .complex_indexing = true,
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+ },
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+};
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+
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static X86CPUDefinition builtin_x86_defs[] = {
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{
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/* qemu64 is the default CPU model for all *-rhel7.* machine-types.
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@@ -2327,6 +2377,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x8000000A,
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.model_id = "AMD EPYC Processor",
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+ .cache_info = &epyc_cache_info,
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},
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{
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.name = "EPYC-IBPB",
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@@ -2373,6 +2424,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_6_EAX_ARAT,
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.xlevel = 0x8000000A,
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.model_id = "AMD EPYC Processor (with IBPB)",
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+ .cache_info = &epyc_cache_info,
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},
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};
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--
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26ba25 |
1.8.3.1
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26ba25 |
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