From 5765ff204771d519ec6c109a8f6b15871251dff0 Mon Sep 17 00:00:00 2001

From: "plai@redhat.com" <plai@redhat.com>

Date: Wed, 3 Apr 2019 15:54:26 +0100

Subject: [PATCH 02/10] i386: Add CPUID bit and feature words for

 IA32_ARCH_CAPABILITIES MSR

RH-Author: plai@redhat.com

Message-id: <1554306874-28796-3-git-send-email-plai@redhat.com>

Patchwork-id: 85386

O-Subject: [RHEL8.1 qemu-kvm PATCH resend 02/10] i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR

Bugzilla: 1561761

RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>

RH-Acked-by: Igor Mammedov <imammedo@redhat.com>

RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>

From: Robert Hoo <robert.hu@linux.intel.com>

Support of IA32_PRED_CMD MSR already be enumerated by same CPUID bit as

SPEC_CTRL.

At present, mark CPUID_7_0_EDX_ARCH_CAPABILITIES unmigratable, per Paolo's

comment.

Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>

Message-Id: <1530781798-183214-3-git-send-email-robert.hu@linux.intel.com>

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

(cherry picked from commit 3fc7c73139d2d38ae80c3b0bc963b1ac1555924c)

Signed-off-by: Paul Lai <plai@redhat.com>

Resolved Conflicts:

	target/i386/cpu.c

Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>

---

 target/i386/cpu.c | 3 ++-

 target/i386/cpu.h | 1 +

 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c

index c979feb..6d38ac0 100644

--- a/target/i386/cpu.c

+++ b/target/i386/cpu.c

@@ -1008,12 +1008,13 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {

             NULL, NULL, NULL, NULL,

             NULL, NULL, NULL, NULL,

             NULL, NULL, "spec-ctrl", "stibp",

-            NULL, NULL, NULL, "ssbd",

+            NULL, "arch-capabilities", NULL, "ssbd",

         },

         .cpuid_eax = 7,

         .cpuid_needs_ecx = true, .cpuid_ecx = 0,

         .cpuid_reg = R_EDX,

         .tcg_features = TCG_7_0_EDX_FEATURES,

+        .unmigratable_flags = CPUID_7_0_EDX_ARCH_CAPABILITIES,

     },

     [FEAT_8000_0007_EDX] = {

         .feat_names = {

diff --git a/target/i386/cpu.h b/target/i386/cpu.h

index 1dc565c..e5e5169 100644

--- a/target/i386/cpu.h

+++ b/target/i386/cpu.h

@@ -687,6 +687,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];

 #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */

 #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */

 #define CPUID_7_0_EDX_SPEC_CTRL     (1U << 26) /* Speculation Control */

+#define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29)  /*Arch Capabilities*/

 #define CPUID_7_0_EDX_SPEC_CTRL_SSBD  (1U << 31) /* Speculative Store Bypass Disable */

 #define KVM_HINTS_DEDICATED (1U << 0)

-- 

1.8.3.1