|
 |
0a122b |
From 4c20b901edfb53e4545aab8fcefb6f40fca25964 Mon Sep 17 00:00:00 2001
|
|
|
0a122b |
From: Andrea Arcangeli <aarcange@redhat.com>
|
|
|
0a122b |
Date: Wed, 12 Feb 2014 13:30:18 +0100
|
|
|
0a122b |
Subject: [PATCH 2/3] fix guest physical bits to match host, to go beyond 1TB guests
|
|
|
0a122b |
|
|
|
0a122b |
RH-Author: Andrea Arcangeli <aarcange@redhat.com>
|
|
|
0a122b |
Message-id: <1392211818-14964-2-git-send-email-aarcange@redhat.com>
|
|
|
0a122b |
Patchwork-id: 57245
|
|
|
0a122b |
O-Subject: [RHEL-7.0 qemu-kvm PATCH] fix guest physical bits to match host, to go beyond 1TB guests
|
|
|
0a122b |
Bugzilla: 989677
|
|
|
0a122b |
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
0a122b |
RH-Acked-by: Andrew Jones <drjones@redhat.com>
|
|
|
0a122b |
RH-Acked-by: Marcelo Tosatti <mtosatti@redhat.com>
|
|
|
0a122b |
|
|
|
0a122b |
Without this patch the guest physical bits are advertised as 40, not
|
|
|
0a122b |
44 or more depending on the hardware capability of the host.
|
|
|
0a122b |
|
|
|
0a122b |
That leads to guest kernel crashes with injection of page faults 9
|
|
|
0a122b |
(see oops: 0009) as bits above 40 in the guest pagetables are
|
|
|
0a122b |
considered reserved.
|
|
|
0a122b |
|
|
|
0a122b |
exregion-0206 [324572448] [17] ex_system_memory_space: System-Memory (width 32) R/W 0 Address=00000000FED00000
|
|
|
0a122b |
BUG: unable to handle kernel paging request at ffffc9006030e000
|
|
|
0a122b |
IP: [<ffffffff812fbb6f>] acpi_ex_system_memory_space_handler+0x23e/0x2cb
|
|
|
0a122b |
PGD e01f875067 PUD 1001f075067 PMD e0178d8067 PTE 80000000fed00173
|
|
|
0a122b |
Oops: 0009 [#1] SMP
|
|
|
0a122b |
|
|
|
0a122b |
(see PUD with bit >=40 set)
|
|
|
0a122b |
|
|
|
0a122b |
Signed-off-by: Andrea Arcangeli <aarcange@redhat.com>
|
|
|
0a122b |
Reported-by: Chegu Vinod <chegu_vinod@hp.com>
|
|
|
0a122b |
---
|
|
|
0a122b |
target-i386/cpu.c | 7 ++++++-
|
|
|
0a122b |
1 file changed, 6 insertions(+), 1 deletion(-)
|
|
|
0a122b |
|
|
|
0a122b |
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
|
|
|
0a122b |
---
|
|
|
0a122b |
target-i386/cpu.c | 7 ++++++-
|
|
|
0a122b |
1 files changed, 6 insertions(+), 1 deletions(-)
|
|
|
0a122b |
|
|
|
0a122b |
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
|
|
|
0a122b |
index 2959915..31ff568 100644
|
|
|
0a122b |
--- a/target-i386/cpu.c
|
|
|
0a122b |
+++ b/target-i386/cpu.c
|
|
|
0a122b |
@@ -2174,8 +2174,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
|
|
|
0a122b |
/* XXX: This value must match the one used in the MMU code. */
|
|
|
0a122b |
if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
|
|
|
0a122b |
/* 64 bit processor */
|
|
|
0a122b |
-/* XXX: The physical address space is limited to 42 bits in exec.c. */
|
|
|
0a122b |
*eax = 0x00003028; /* 48 bits virtual, 40 bits physical */
|
|
|
0a122b |
+ if (kvm_enabled()) {
|
|
|
0a122b |
+ uint32_t _eax;
|
|
|
0a122b |
+ host_cpuid(0x80000000, 0, &_eax, NULL, NULL, NULL);
|
|
|
0a122b |
+ if (_eax >= 0x80000008)
|
|
|
0a122b |
+ host_cpuid(0x80000008, 0, eax, NULL, NULL, NULL);
|
|
|
0a122b |
+ }
|
|
|
0a122b |
} else {
|
|
|
0a122b |
if (env->features[FEAT_1_EDX] & CPUID_PSE36) {
|
|
|
0a122b |
*eax = 0x00000024; /* 36 bits physical */
|
|
|
0a122b |
--
|
|
|
0a122b |
1.7.1
|
|
|
0a122b |
|