Blame SOURCES/0095-cxl-list-Emit-device-serial-numbers.patch

e0018b
From 2d1b8cea119ca2bb0eec8ebb2dfb1b6c4d844ddd Mon Sep 17 00:00:00 2001
e0018b
From: Dan Williams <dan.j.williams@intel.com>
e0018b
Date: Sun, 23 Jan 2022 16:52:36 -0800
e0018b
Subject: [PATCH 095/217] cxl/list: Emit device serial numbers
e0018b
e0018b
Starting with the v5.17 kernel the CXL driver emits the mandatory device
e0018b
serial number for each memory device. Include it in the memory device
e0018b
listing.
e0018b
e0018b
Link: https://lore.kernel.org/r/164298555630.3021641.3246226448369816200.stgit@dwillia2-desk3.amr.corp.intel.com
e0018b
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
e0018b
Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
e0018b
---
e0018b
 Documentation/cxl/cxl-list.txt | 15 +++++++++------
e0018b
 cxl/json.c                     | 11 ++++++++++-
e0018b
 cxl/lib/libcxl.c               | 11 +++++++++++
e0018b
 cxl/lib/libcxl.sym             |  5 +++++
e0018b
 cxl/lib/private.h              |  1 +
e0018b
 cxl/libcxl.h                   |  1 +
e0018b
 6 files changed, 37 insertions(+), 7 deletions(-)
e0018b
e0018b
diff --git a/Documentation/cxl/cxl-list.txt b/Documentation/cxl/cxl-list.txt
e0018b
index 4d409ba..bd0207e 100644
e0018b
--- a/Documentation/cxl/cxl-list.txt
e0018b
+++ b/Documentation/cxl/cxl-list.txt
e0018b
@@ -41,22 +41,25 @@ OPTIONS
e0018b
   "ram_size":0,
e0018b
 }
e0018b
 
e0018b
-# cxl list -m "0 mem1 2"
e0018b
+# cxl list -M --memdev="0 mem3 5"
e0018b
 [
e0018b
   {
e0018b
     "memdev":"mem0",
e0018b
     "pmem_size":268435456,
e0018b
-    "ram_size":0
e0018b
+    "ram_size":0,
e0018b
+    "serial":0
e0018b
   },
e0018b
   {
e0018b
-    "memdev":"mem2",
e0018b
+    "memdev":"mem3",
e0018b
     "pmem_size":268435456,
e0018b
-    "ram_size":268435456
e0018b
+    "ram_size":268435456,
e0018b
+    "serial":2
e0018b
   },
e0018b
   {
e0018b
-    "memdev":"mem1",
e0018b
+    "memdev":"mem5",
e0018b
     "pmem_size":268435456,
e0018b
-    "ram_size":268435456
e0018b
+    "ram_size":268435456,
e0018b
+    "serial":4
e0018b
   }
e0018b
 ]
e0018b
 ----
e0018b
diff --git a/cxl/json.c b/cxl/json.c
e0018b
index 3ef9f76..d8e65df 100644
e0018b
--- a/cxl/json.c
e0018b
+++ b/cxl/json.c
e0018b
@@ -1,5 +1,6 @@
e0018b
 // SPDX-License-Identifier: GPL-2.0
e0018b
-// Copyright (C) 2015-2020 Intel Corporation. All rights reserved.
e0018b
+// Copyright (C) 2015-2021 Intel Corporation. All rights reserved.
e0018b
+#include <limits.h>
e0018b
 #include <util/json.h>
e0018b
 #include <uuid/uuid.h>
e0018b
 #include <cxl/libcxl.h>
e0018b
@@ -188,6 +189,7 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev,
e0018b
 {
e0018b
 	const char *devname = cxl_memdev_get_devname(memdev);
e0018b
 	struct json_object *jdev, *jobj;
e0018b
+	unsigned long long serial;
e0018b
 
e0018b
 	jdev = json_object_new_object();
e0018b
 	if (!jdev)
e0018b
@@ -210,5 +212,12 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev,
e0018b
 		if (jobj)
e0018b
 			json_object_object_add(jdev, "health", jobj);
e0018b
 	}
e0018b
+
e0018b
+	serial = cxl_memdev_get_serial(memdev);
e0018b
+	if (serial < ULLONG_MAX) {
e0018b
+		jobj = util_json_object_hex(serial, flags);
e0018b
+		if (jobj)
e0018b
+			json_object_object_add(jdev, "serial", jobj);
e0018b
+	}
e0018b
 	return jdev;
e0018b
 }
e0018b
diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c
e0018b
index 3390eb9..8d3cf80 100644
e0018b
--- a/cxl/lib/libcxl.c
e0018b
+++ b/cxl/lib/libcxl.c
e0018b
@@ -296,6 +296,12 @@ static void *add_cxl_memdev(void *parent, int id, const char *cxlmem_base)
e0018b
 	if (memdev->lsa_size == ULLONG_MAX)
e0018b
 		goto err_read;
e0018b
 
e0018b
+	sprintf(path, "%s/serial", cxlmem_base);
e0018b
+	if (sysfs_read_attr(ctx, path, buf) < 0)
e0018b
+		memdev->serial = ULLONG_MAX;
e0018b
+	else
e0018b
+		memdev->serial = strtoull(buf, NULL, 0);
e0018b
+
e0018b
 	memdev->dev_path = strdup(cxlmem_base);
e0018b
 	if (!memdev->dev_path)
e0018b
 		goto err_read;
e0018b
@@ -371,6 +377,11 @@ CXL_EXPORT int cxl_memdev_get_id(struct cxl_memdev *memdev)
e0018b
 	return memdev->id;
e0018b
 }
e0018b
 
e0018b
+CXL_EXPORT unsigned long long cxl_memdev_get_serial(struct cxl_memdev *memdev)
e0018b
+{
e0018b
+	return memdev->serial;
e0018b
+}
e0018b
+
e0018b
 CXL_EXPORT const char *cxl_memdev_get_devname(struct cxl_memdev *memdev)
e0018b
 {
e0018b
 	return devpath_to_devname(memdev->dev_path);
e0018b
diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym
e0018b
index 077d104..4411035 100644
e0018b
--- a/cxl/lib/libcxl.sym
e0018b
+++ b/cxl/lib/libcxl.sym
e0018b
@@ -73,3 +73,8 @@ global:
e0018b
 local:
e0018b
         *;
e0018b
 };
e0018b
+
e0018b
+LIBCXL_2 {
e0018b
+global:
e0018b
+	cxl_memdev_get_serial;
e0018b
+} LIBCXL_1;
e0018b
diff --git a/cxl/lib/private.h b/cxl/lib/private.h
e0018b
index a1b8b50..28f7e16 100644
e0018b
--- a/cxl/lib/private.h
e0018b
+++ b/cxl/lib/private.h
e0018b
@@ -31,6 +31,7 @@ struct cxl_memdev {
e0018b
 	size_t lsa_size;
e0018b
 	struct kmod_module *module;
e0018b
 	struct cxl_nvdimm_bridge *bridge;
e0018b
+	unsigned long long serial;
e0018b
 };
e0018b
 
e0018b
 enum cxl_cmd_query_status {
e0018b
diff --git a/cxl/libcxl.h b/cxl/libcxl.h
e0018b
index 89d35ba..bcdede8 100644
e0018b
--- a/cxl/libcxl.h
e0018b
+++ b/cxl/libcxl.h
e0018b
@@ -35,6 +35,7 @@ struct cxl_memdev;
e0018b
 struct cxl_memdev *cxl_memdev_get_first(struct cxl_ctx *ctx);
e0018b
 struct cxl_memdev *cxl_memdev_get_next(struct cxl_memdev *memdev);
e0018b
 int cxl_memdev_get_id(struct cxl_memdev *memdev);
e0018b
+unsigned long long cxl_memdev_get_serial(struct cxl_memdev *memdev);
e0018b
 const char *cxl_memdev_get_devname(struct cxl_memdev *memdev);
e0018b
 int cxl_memdev_get_major(struct cxl_memdev *memdev);
e0018b
 int cxl_memdev_get_minor(struct cxl_memdev *memdev);
e0018b
-- 
e0018b
2.27.0
e0018b