Blame SOURCES/0060-Fix-arm64-register-allocation-issue-for-XLOAD.patch

006bc1
From 43a3893b0d7d82bfbfd13bf458a5906f755989c9 Mon Sep 17 00:00:00 2001
006bc1
From: Patrick Galizia <pgalizia.qdt@qualcommdatacenter.com>
006bc1
Date: Fri, 24 Aug 2018 11:02:15 -0400
006bc1
Subject: [PATCH 60/72] Fix arm64 register allocation issue for XLOAD.
006bc1
006bc1
For the arm64 implementation of asm_xload(), it is possible for
006bc1
the dest register selected to be the same as one of the source
006bc1
registers generated in the asm_fusexref() call.  To prevent this,
006bc1
exclude the dest register from the list of allowed registers for
006bc1
that call.
006bc1
006bc1
Thanks to Javier for guidance as well as his script to replicate
006bc1
the issue.
006bc1
---
006bc1
 src/lj_asm_arm64.h | 3 ++-
006bc1
 1 file changed, 2 insertions(+), 1 deletion(-)
006bc1
006bc1
diff --git a/src/lj_asm_arm64.h b/src/lj_asm_arm64.h
006bc1
index baafa21..045f260 100644
006bc1
--- a/src/lj_asm_arm64.h
006bc1
+++ b/src/lj_asm_arm64.h
006bc1
@@ -1008,7 +1008,8 @@ static void asm_xload(ASMState *as, IRIns *ir)
006bc1
 {
006bc1
   Reg dest = ra_dest(as, ir, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR);
006bc1
   lua_assert(!(ir->op2 & IRXLOAD_UNALIGNED));
006bc1
-  asm_fusexref(as, asm_fxloadins(ir), dest, ir->op1, RSET_GPR);
006bc1
+  asm_fusexref(as, asm_fxloadins(ir), dest, ir->op1,
006bc1
+               rset_exclude(RSET_GPR, dest));
006bc1
 }
006bc1
 
006bc1
 static void asm_xstore(ASMState *as, IRIns *ir)
006bc1
-- 
006bc1
2.20.1
006bc1