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From acc51748038a8074fe3a7c769b101455afd64eb7 Mon Sep 17 00:00:00 2001
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Message-Id: <acc51748038a8074fe3a7c769b101455afd64eb7@dist-git>
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From: Jiri Denemark <jdenemar@redhat.com>
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Date: Fri, 13 Dec 2019 14:28:08 +0100
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Subject: [PATCH] cpu_map: Add TSX_CTRL bit for IA32_ARCH_CAPABILITIES MSR
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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CVE-2019-11135
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When TSX_CTRL bit of IA32_ARCH_CAPABILITIES MSR is set to 1, the CPU
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supports IA32_TSX_CTRL MSR which can be used to disable and/or mask TSX.
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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Reviewed-by: Ján Tomko <jtomko@redhat.com>
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(cherry picked from commit f411b7ef68221e82dec0129aaf2f2a26a8987504)
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Conflicts:
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src/cpu_map/x86_features.xml
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- cpu_map is still monolithic downstream
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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Message-Id: <cb4f05c8c84ed910bcd4bceae58f6fd090684031.1576243094.git.jdenemar@redhat.com>
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Reviewed-by: Ján Tomko <jtomko@redhat.com>
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---
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src/cpu/cpu_map.xml | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
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index c2b3fca47a..9609ce71a7 100644
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--- a/src/cpu/cpu_map.xml
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+++ b/src/cpu/cpu_map.xml
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@@ -501,6 +501,9 @@
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<feature name='mds-no'>
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<msr index='0x10a' edx='0x00000000' eax='0x00000020'/>
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</feature>
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+ <feature name='tsx-ctrl'>
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+ <msr index='0x10a' edx='0x00000000' eax='0x00000080'/>
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+ </feature>
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<feature name='taa-no'>
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<msr index='0x10a' edx='0x00000000' eax='0x00000100'/>
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</feature>
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--
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2.24.1
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