|
|
4ca1da |
|
|
|
4ca1da |
# HG changeset patch
|
|
|
4ca1da |
# User thartmann
|
|
|
4ca1da |
# Date 1539594027 -7200
|
|
|
4ca1da |
# Node ID e044997c2edaeae97866394a7f8e2ddebbd41392
|
|
|
4ca1da |
# Parent 99212080341058548d449a22d1381e79353ec5b5
|
|
|
4ca1da |
8172850: Anti-dependency on membar causes crash in register allocator due to invalid instruction scheduling
|
|
|
4ca1da |
Summary: Regression test and additional asserts. The problem is fixed by 8087341.
|
|
|
4ca1da |
Reviewed-by: kvn
|
|
|
4ca1da |
|
|
|
4ca1da |
diff -r 992120803410 -r e044997c2eda src/share/vm/opto/cfgnode.cpp
|
|
|
4ca1da |
--- openjdk/hotspot/src/share/vm/opto/cfgnode.cpp Mon Oct 22 05:26:38 2018 -0400
|
|
|
4ca1da |
+++ openjdk/hotspot/src/share/vm/opto/cfgnode.cpp Mon Oct 15 11:00:27 2018 +0200
|
|
|
4ca1da |
@@ -2016,6 +2016,7 @@
|
|
|
4ca1da |
uint ideal_reg = _type->ideal_reg();
|
|
|
4ca1da |
assert( ideal_reg != Node::NotAMachineReg, "invalid type at Phi" );
|
|
|
4ca1da |
if( ideal_reg == 0 ) return RegMask::Empty;
|
|
|
4ca1da |
+ assert(ideal_reg != Op_RegFlags, "flags register is not spillable");
|
|
|
4ca1da |
return *(Compile::current()->matcher()->idealreg2spillmask[ideal_reg]);
|
|
|
4ca1da |
}
|
|
|
4ca1da |
|
|
|
4ca1da |
diff -r 992120803410 -r e044997c2eda src/share/vm/opto/coalesce.cpp
|
|
|
4ca1da |
--- openjdk/hotspot/src/share/vm/opto/coalesce.cpp Mon Oct 22 05:26:38 2018 -0400
|
|
|
4ca1da |
+++ openjdk/hotspot/src/share/vm/opto/coalesce.cpp Mon Oct 15 11:00:27 2018 +0200
|
|
|
4ca1da |
@@ -292,7 +292,14 @@
|
|
|
4ca1da |
// Copy any flags as well
|
|
|
4ca1da |
_phc.clone_projs(pred, pred->end_idx(), m, copy, _phc._lrg_map);
|
|
|
4ca1da |
} else {
|
|
|
4ca1da |
- const RegMask *rm = C->matcher()->idealreg2spillmask[m->ideal_reg()];
|
|
|
4ca1da |
+ int ireg = m->ideal_reg();
|
|
|
4ca1da |
+ if (ireg == 0 || ireg == Op_RegFlags) {
|
|
|
4ca1da |
+ assert(false, err_msg("attempted to spill a non-spillable item: %d: %s, ireg = %d",
|
|
|
4ca1da |
+ m->_idx, m->Name(), ireg));
|
|
|
4ca1da |
+ C->record_method_not_compilable("attempted to spill a non-spillable item");
|
|
|
4ca1da |
+ return;
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+ const RegMask *rm = C->matcher()->idealreg2spillmask[ireg];
|
|
|
4ca1da |
copy = new (C) MachSpillCopyNode(m, *rm, *rm);
|
|
|
4ca1da |
// Find a good place to insert. Kinda tricky, use a subroutine
|
|
|
4ca1da |
insert_copy_with_overlap(pred,copy,phi_name,src_name);
|
|
|
4ca1da |
@@ -326,7 +333,14 @@
|
|
|
4ca1da |
b->insert_node(copy, l++);
|
|
|
4ca1da |
l += _phc.clone_projs(b, l, m, copy, _phc._lrg_map);
|
|
|
4ca1da |
} else {
|
|
|
4ca1da |
- const RegMask *rm = C->matcher()->idealreg2spillmask[m->ideal_reg()];
|
|
|
4ca1da |
+ int ireg = m->ideal_reg();
|
|
|
4ca1da |
+ if (ireg == 0 || ireg == Op_RegFlags) {
|
|
|
4ca1da |
+ assert(false, err_msg("attempted to spill a non-spillable item: %d: %s, ireg = %d",
|
|
|
4ca1da |
+ m->_idx, m->Name(), ireg));
|
|
|
4ca1da |
+ C->record_method_not_compilable("attempted to spill a non-spillable item");
|
|
|
4ca1da |
+ return;
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+ const RegMask *rm = C->matcher()->idealreg2spillmask[ireg];
|
|
|
4ca1da |
copy = new (C) MachSpillCopyNode(m, *rm, *rm);
|
|
|
4ca1da |
// Insert the copy in the basic block, just before us
|
|
|
4ca1da |
b->insert_node(copy, l++);
|
|
|
4ca1da |
@@ -373,7 +387,14 @@
|
|
|
4ca1da |
if( k < b->_num_succs )
|
|
|
4ca1da |
continue; // Live out; do not pre-split
|
|
|
4ca1da |
// Split the lrg at this use
|
|
|
4ca1da |
- const RegMask *rm = C->matcher()->idealreg2spillmask[inp->ideal_reg()];
|
|
|
4ca1da |
+ int ireg = inp->ideal_reg();
|
|
|
4ca1da |
+ if (ireg == 0 || ireg == Op_RegFlags) {
|
|
|
4ca1da |
+ assert(false, err_msg("attempted to spill a non-spillable item: %d: %s, ireg = %d",
|
|
|
4ca1da |
+ inp->_idx, inp->Name(), ireg));
|
|
|
4ca1da |
+ C->record_method_not_compilable("attempted to spill a non-spillable item");
|
|
|
4ca1da |
+ return;
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+ const RegMask *rm = C->matcher()->idealreg2spillmask[ireg];
|
|
|
4ca1da |
Node *copy = new (C) MachSpillCopyNode( inp, *rm, *rm );
|
|
|
4ca1da |
// Insert the copy in the use-def chain
|
|
|
4ca1da |
n->set_req(inpidx, copy );
|
|
|
4ca1da |
diff -r 992120803410 -r e044997c2eda src/share/vm/opto/machnode.cpp
|
|
|
4ca1da |
--- openjdk/hotspot/src/share/vm/opto/machnode.cpp Mon Oct 22 05:26:38 2018 -0400
|
|
|
4ca1da |
+++ openjdk/hotspot/src/share/vm/opto/machnode.cpp Mon Oct 15 11:00:27 2018 +0200
|
|
|
4ca1da |
@@ -619,6 +619,7 @@
|
|
|
4ca1da |
}
|
|
|
4ca1da |
|
|
|
4ca1da |
// Values outside the domain represent debug info
|
|
|
4ca1da |
+ assert(in(idx)->ideal_reg() != Op_RegFlags, "flags register is not spillable");
|
|
|
4ca1da |
return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];
|
|
|
4ca1da |
}
|
|
|
4ca1da |
|
|
|
4ca1da |
diff -r 992120803410 -r e044997c2eda src/share/vm/opto/matcher.cpp
|
|
|
4ca1da |
--- openjdk/hotspot/src/share/vm/opto/matcher.cpp Mon Oct 22 05:26:38 2018 -0400
|
|
|
4ca1da |
+++ openjdk/hotspot/src/share/vm/opto/matcher.cpp Mon Oct 15 11:00:27 2018 +0200
|
|
|
4ca1da |
@@ -95,6 +95,7 @@
|
|
|
4ca1da |
idealreg2spillmask [Op_VecD] = NULL;
|
|
|
4ca1da |
idealreg2spillmask [Op_VecX] = NULL;
|
|
|
4ca1da |
idealreg2spillmask [Op_VecY] = NULL;
|
|
|
4ca1da |
+ idealreg2spillmask [Op_RegFlags] = NULL;
|
|
|
4ca1da |
|
|
|
4ca1da |
idealreg2debugmask [Op_RegI] = NULL;
|
|
|
4ca1da |
idealreg2debugmask [Op_RegN] = NULL;
|
|
|
4ca1da |
@@ -106,6 +107,7 @@
|
|
|
4ca1da |
idealreg2debugmask [Op_VecD] = NULL;
|
|
|
4ca1da |
idealreg2debugmask [Op_VecX] = NULL;
|
|
|
4ca1da |
idealreg2debugmask [Op_VecY] = NULL;
|
|
|
4ca1da |
+ idealreg2debugmask [Op_RegFlags] = NULL;
|
|
|
4ca1da |
|
|
|
4ca1da |
idealreg2mhdebugmask[Op_RegI] = NULL;
|
|
|
4ca1da |
idealreg2mhdebugmask[Op_RegN] = NULL;
|
|
|
4ca1da |
@@ -117,6 +119,7 @@
|
|
|
4ca1da |
idealreg2mhdebugmask[Op_VecD] = NULL;
|
|
|
4ca1da |
idealreg2mhdebugmask[Op_VecX] = NULL;
|
|
|
4ca1da |
idealreg2mhdebugmask[Op_VecY] = NULL;
|
|
|
4ca1da |
+ idealreg2mhdebugmask[Op_RegFlags] = NULL;
|
|
|
4ca1da |
|
|
|
4ca1da |
debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node
|
|
|
4ca1da |
}
|
|
|
4ca1da |
diff -r 992120803410 -r e044997c2eda test/compiler/gcbarriers/TestMembarDependencies.java
|
|
|
4ca1da |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
|
|
|
4ca1da |
+++ openjdk/hotspot/test/compiler/gcbarriers/TestMembarDependencies.java Mon Oct 15 11:00:27 2018 +0200
|
|
|
4ca1da |
@@ -0,0 +1,98 @@
|
|
|
4ca1da |
+/*
|
|
|
4ca1da |
+ * Copyright (c) 2017, Oracle and/or its affiliates. All rights reserved.
|
|
|
4ca1da |
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
|
|
4ca1da |
+ *
|
|
|
4ca1da |
+ * This code is free software; you can redistribute it and/or modify it
|
|
|
4ca1da |
+ * under the terms of the GNU General Public License version 2 only, as
|
|
|
4ca1da |
+ * published by the Free Software Foundation.
|
|
|
4ca1da |
+ *
|
|
|
4ca1da |
+ * This code is distributed in the hope that it will be useful, but WITHOUT
|
|
|
4ca1da |
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
|
4ca1da |
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
|
|
4ca1da |
+ * version 2 for more details (a copy is included in the LICENSE file that
|
|
|
4ca1da |
+ * accompanied this code).
|
|
|
4ca1da |
+ *
|
|
|
4ca1da |
+ * You should have received a copy of the GNU General Public License version
|
|
|
4ca1da |
+ * 2 along with this work; if not, write to the Free Software Foundation,
|
|
|
4ca1da |
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
|
|
4ca1da |
+ *
|
|
|
4ca1da |
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
|
|
4ca1da |
+ * or visit www.oracle.com if you need additional information or have any
|
|
|
4ca1da |
+ * questions.
|
|
|
4ca1da |
+ */
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+/*
|
|
|
4ca1da |
+ * @test TestMembarDependencies
|
|
|
4ca1da |
+ * @bug 8172850
|
|
|
4ca1da |
+ * @summary Tests correct scheduling of memory loads around MembarVolatile emitted by GC barriers.
|
|
|
4ca1da |
+ * @library /testlibrary
|
|
|
4ca1da |
+ * @run driver compiler.membars.TestMembarDependencies
|
|
|
4ca1da |
+ */
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+package compiler.membars;
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+import com.oracle.java.testlibrary.*;
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+public class TestMembarDependencies {
|
|
|
4ca1da |
+ private static TestMembarDependencies f1;
|
|
|
4ca1da |
+ private static TestMembarDependencies f2;
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+ public static void main(String args[]) throws Throwable {
|
|
|
4ca1da |
+ if (args.length == 0) {
|
|
|
4ca1da |
+ // For debugging, add "-XX:+TraceOptoPipelining"
|
|
|
4ca1da |
+ OutputAnalyzer oa = ProcessTools.executeTestJvm("-XX:+IgnoreUnrecognizedVMOptions",
|
|
|
4ca1da |
+ "-XX:-TieredCompilation", "-XX:-BackgroundCompilation", "-XX:+PrintOpto",
|
|
|
4ca1da |
+ "-XX:CompileCommand=compileonly,compiler.membars.TestMembarDependencies::test*",
|
|
|
4ca1da |
+ "-XX:CompileCommand=dontinline,compiler.membars.TestMembarDependencies::test_m1",
|
|
|
4ca1da |
+ TestMembarDependencies.class.getName(), "run");
|
|
|
4ca1da |
+ // C2 should not crash or bail out from compilation
|
|
|
4ca1da |
+ oa.shouldHaveExitValue(0);
|
|
|
4ca1da |
+ oa.shouldNotMatch("Bailout: Recompile without subsuming loads");
|
|
|
4ca1da |
+ System.out.println(oa.getOutput());
|
|
|
4ca1da |
+ } else {
|
|
|
4ca1da |
+ f2 = new TestMembarDependencies();
|
|
|
4ca1da |
+ // Trigger compilation of test1 and test2
|
|
|
4ca1da |
+ for (int i = 0; i < 10_000; ++i) {
|
|
|
4ca1da |
+ f2.test1(f2);
|
|
|
4ca1da |
+ f2.test2(f2);
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+ public void test_m1() { }
|
|
|
4ca1da |
+ public void test_m2() { }
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+ public void test1(TestMembarDependencies obj) {
|
|
|
4ca1da |
+ // Try/catch/finally is used to create a CFG block without a test + jmpCon
|
|
|
4ca1da |
+ // allowing GCM to schedule the testN_mem_reg0 instruction into that block.
|
|
|
4ca1da |
+ try {
|
|
|
4ca1da |
+ // Method call defines memory state that is then
|
|
|
4ca1da |
+ // used by subsequent instructions/blocks (see below).
|
|
|
4ca1da |
+ test_m1();
|
|
|
4ca1da |
+ } catch (Exception e) {
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+ } finally {
|
|
|
4ca1da |
+ // Oop write to field emits a GC post-barrier with a MembarVolatile
|
|
|
4ca1da |
+ // which has a wide memory effect (kills all memory). This creates an
|
|
|
4ca1da |
+ // anti-dependency on all surrounding memory loads.
|
|
|
4ca1da |
+ f1 = obj;
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+ // The empty method m2 is inlined but the null check of f2 remains. It is encoded
|
|
|
4ca1da |
+ // as CmpN(LoadN(MEM), NULL) where MEM is the memory after the call to test_m1().
|
|
|
4ca1da |
+ // This is matched to testN_mem_reg0 on x86 which is scheduled before the barrier
|
|
|
4ca1da |
+ // in the try/catch block due to the anti-dependency on the MembarVolatile.
|
|
|
4ca1da |
+ // C2 crashes in the register allocator when trying to spill the flag register
|
|
|
4ca1da |
+ // to keep the result of the testN instruction live from the try/catch block
|
|
|
4ca1da |
+ // until it is here.
|
|
|
4ca1da |
+ f2.test_m2();
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+
|
|
|
4ca1da |
+ public void test2(TestMembarDependencies obj) {
|
|
|
4ca1da |
+ // Same as test1 but without try/catch/finally.
|
|
|
4ca1da |
+ // This causes C2 to bail out in block local scheduling because testN_mem_reg0 is
|
|
|
4ca1da |
+ // scheduled into a block that already contains another test + jmpCon instruction.
|
|
|
4ca1da |
+ test_m1();
|
|
|
4ca1da |
+ f1 = obj;
|
|
|
4ca1da |
+ f2.test_m2();
|
|
|
4ca1da |
+ }
|
|
|
4ca1da |
+}
|
|
|
4ca1da |
|