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commit d644dfe36d9733c767af62d37250253ced6efd8c
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Author: Cui,Lili <lili.cui@intel.com>
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Date: Mon Nov 7 11:25:41 2022 +0800
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Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS
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gcc/ChangeLog:
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* config/i386/driver-i386.cc (host_detect_local_cpu):
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Move sapphirerapids out of AVX512_VP2INTERSECT.
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* config/i386/i386.h: Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS
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* doc/invoke.texi: Remove AVX512_VP2INTERSECT from SAPPHIRERAPIDS
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(cherry picked from commit d644dfe36d9733c767af62d37250253ced6efd8c)
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diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
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index 9e0ae0b2baa..fcf23fd921d 100644
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--- a/gcc/config/i386/driver-i386.cc
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+++ b/gcc/config/i386/driver-i386.cc
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@@ -574,15 +574,12 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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/* This is unknown family 0x6 CPU. */
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if (has_feature (FEATURE_AVX))
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{
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+ /* Assume Tiger Lake */
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if (has_feature (FEATURE_AVX512VP2INTERSECT))
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- {
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- if (has_feature (FEATURE_TSXLDTRK))
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- /* Assume Sapphire Rapids. */
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- cpu = "sapphirerapids";
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- else
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- /* Assume Tiger Lake */
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- cpu = "tigerlake";
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- }
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+ cpu = "tigerlake";
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+ /* Assume Sapphire Rapids. */
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+ else if (has_feature (FEATURE_TSXLDTRK))
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+ cpu = "sapphirerapids";
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/* Assume Cooper Lake */
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else if (has_feature (FEATURE_AVX512BF16))
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cpu = "cooperlake";
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diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
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index 363082ba47b..a61c32b8957 100644
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--- a/gcc/config/i386/i386.h
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+++ b/gcc/config/i386/i386.h
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@@ -2328,10 +2328,9 @@ constexpr wide_int_bitmask PTA_ICELAKE_SERVER = PTA_ICELAKE_CLIENT
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constexpr wide_int_bitmask PTA_TIGERLAKE = PTA_ICELAKE_CLIENT | PTA_MOVDIRI
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| PTA_MOVDIR64B | PTA_CLWB | PTA_AVX512VP2INTERSECT | PTA_KL | PTA_WIDEKL;
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constexpr wide_int_bitmask PTA_SAPPHIRERAPIDS = PTA_ICELAKE_SERVER | PTA_MOVDIRI
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- | PTA_MOVDIR64B | PTA_AVX512VP2INTERSECT | PTA_ENQCMD | PTA_CLDEMOTE
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- | PTA_PTWRITE | PTA_WAITPKG | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE
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- | PTA_AMX_INT8 | PTA_AMX_BF16 | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16
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- | PTA_AVX512BF16;
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+ | PTA_MOVDIR64B | PTA_ENQCMD | PTA_CLDEMOTE | PTA_PTWRITE | PTA_WAITPKG
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+ | PTA_SERIALIZE | PTA_TSXLDTRK | PTA_AMX_TILE | PTA_AMX_INT8 | PTA_AMX_BF16
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+ | PTA_UINTR | PTA_AVXVNNI | PTA_AVX512FP16 | PTA_AVX512BF16;
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constexpr wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF
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| PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD | PTA_PREFETCHWT1;
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constexpr wide_int_bitmask PTA_BONNELL = PTA_CORE2 | PTA_MOVBE;
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diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
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index 3749e06f13e..cee057a70bf 100644
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--- a/gcc/doc/invoke.texi
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+++ b/gcc/doc/invoke.texi
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@@ -31541,11 +31541,11 @@ Intel sapphirerapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
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SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
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RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW,
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AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ,
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-AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2
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+AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2,
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VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB,
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-MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG,
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-SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16
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-and AVX512BF16 instruction set support.
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+MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK,
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+UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16 and AVX512BF16
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+instruction set support.
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@item alderlake
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Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
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