Blame SOURCES/gdb-6.6-bz230000-power6-disassembly-test.patch

4416f5
From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
4416f5
From: Fedora GDB patches <invalid@email.com>
4416f5
Date: Fri, 27 Oct 2017 21:07:50 +0200
4416f5
Subject: gdb-6.6-bz230000-power6-disassembly-test.patch
4416f5
4416f5
;; Testcase for PPC Power6/DFP instructions disassembly (BZ 230000).
4416f5
;;=fedoratest
4416f5
4416f5
https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=230000
4416f5
4416f5
The original testcase
4416f5
	https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=230000#c1
4416f5
requires too recent GCC.
4416f5
4416f5
diff --git a/gdb/testsuite/gdb.arch/powerpc-power6.exp b/gdb/testsuite/gdb.arch/powerpc-power6.exp
4416f5
new file mode 100644
4416f5
--- /dev/null
4416f5
+++ b/gdb/testsuite/gdb.arch/powerpc-power6.exp
4416f5
@@ -0,0 +1,54 @@
4416f5
+# Copyright 2007 Free Software Foundation, Inc.
4416f5
+
4416f5
+# This program is free software; you can redistribute it and/or modify
4416f5
+# it under the terms of the GNU General Public License as published by
4416f5
+# the Free Software Foundation; either version 2 of the License, or
4416f5
+# (at your option) any later version.
4416f5
+#
4416f5
+# This program is distributed in the hope that it will be useful,
4416f5
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
4416f5
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
4416f5
+# GNU General Public License for more details.
4416f5
+#
4416f5
+# You should have received a copy of the GNU General Public License
4416f5
+# along with this program; if not, write to the Free Software
4416f5
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
4416f5
+
4416f5
+# Test PowerPC Power6 instructions disassembly.
4416f5
+
4416f5
+if {![istarget "powerpc*-*-*"]} then {
4416f5
+    verbose "Skipping PowerPC Power6 instructions disassembly."
4416f5
+    return
4416f5
+}
4416f5
+
4416f5
+set testfile "powerpc-power6"
4416f5
+set srcfile ${testfile}.s
4416f5
+set objfile [standard_output_file ${testfile}.o]
4416f5
+
4416f5
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
4416f5
+    untested "PowerPC prologue tests"
4416f5
+    return -1
4416f5
+}
4416f5
+
4416f5
+
4416f5
+gdb_exit
4416f5
+gdb_start
4416f5
+gdb_reinitialize_dir $srcdir/$subdir
4416f5
+gdb_load ${objfile}
4416f5
+
4416f5
+# Disassemble the function.
4416f5
+
4416f5
+gdb_test "disass func" ":\tblr\r\n.*" "Basic disassembly"
4416f5
+
4416f5
+gdb_test "disass func" ":\tdcbzl  *r8,r9\r\n.*" "Power5 disassembly dcbzl"
4416f5
+gdb_test "disass func" ":\tfrsqrtes  *f10,f11\r\n.*" "Power5 disassembly frsqrtes"
4416f5
+gdb_test "disass func" ":\tdadd  *f1,f2,f1\r\n.*" "Power6 disassembly dadd"
4416f5
+gdb_test "disass func" ":\tdaddq  *f0,f2,f0\r\n.*" "Power6 disassembly daddq"
4416f5
+gdb_test "disass func" ":\tdsub  *f1,f2,f1\r\n.*" "Power6 disassembly dsub"
4416f5
+gdb_test "disass func" ":\tdsubq  *f0,f2,f0\r\n.*" "Power6 disassembly dsubq"
4416f5
+gdb_test "disass func" ":\tdmul  *f1,f2,f1\r\n.*" "Power6 disassembly dmul"
4416f5
+gdb_test "disass func" ":\tdmulq  *f0,f2,f0\r\n.*" "Power6 disassembly dmulq"
4416f5
+gdb_test "disass func" ":\tddiv  *f1,f2,f1\r\n.*" "Power6 disassembly ddiv"
4416f5
+gdb_test "disass func" ":\tddivq  *f0,f2,f0\r\n.*" "Power6 disassembly ddivq"
4416f5
+gdb_test "disass func" ":\tdcmpu  *cr1,f2,f1\r\n.*" "Power6 disassembly dcmpu"
4416f5
+gdb_test "disass func" ":\tdcmpuq  *cr1,f2,f0\r\n.*" "Power6 disassembly dcmpuq"
4416f5
diff --git a/gdb/testsuite/gdb.arch/powerpc-power6.s b/gdb/testsuite/gdb.arch/powerpc-power6.s
4416f5
new file mode 100644
4416f5
--- /dev/null
4416f5
+++ b/gdb/testsuite/gdb.arch/powerpc-power6.s
4416f5
@@ -0,0 +1,16 @@
4416f5
+	.text
4416f5
+	.globl	func
4416f5
+func:
4416f5
+	blr
4416f5
+	.long	0x7c284fec	/* dcbzl	r8,r9		*/
4416f5
+	.long	0xed405834	/* frsqrtes	f10,f11		*/
4416f5
+	.long	0xec220804	/* dadd		f1,f2,f1	*/
4416f5
+	.long	0xfc020004	/* daddq	f0,f2,f0	*/
4416f5
+	.long	0xec220c04	/* dsub		f1,f2,f1	*/
4416f5
+	.long	0xfc020404	/* dsubq	f0,f2,f0	*/
4416f5
+	.long	0xec220844	/* dmul		f1,f2,f1	*/
4416f5
+	.long	0xfc020044	/* dmulq	f0,f2,f0	*/
4416f5
+	.long	0xec220c44	/* ddiv		f1,f2,f1	*/
4416f5
+	.long	0xfc020444	/* ddivq	f0,f2,f0	*/
4416f5
+	.long	0xec820d04	/* dcmpu	cr1,f2,f1	*/
4416f5
+	.long	0xfc820504	/* dcmpuq	cr1,f2,f0	*/