diff --git a/erlang.spec b/erlang.spec
index bc3f5be..7d3aa37 100644
--- a/erlang.spec
+++ b/erlang.spec
@@ -16,7 +16,7 @@
 
 Name:		erlang
 Version:	18.2.3
-Release:	1%{?dist}
+Release:	2%{?dist}
 Summary:	General-purpose programming language and runtime environment
 
 Group:		Development/Languages
@@ -75,6 +75,9 @@ Patch8: otp-0008-Add-patch-to-crash-dump-on-large-distribution.patch
 # Fedora specific patch
 #   epmd: support IPv6 node registration
 Patch9: otp-0009-epmd-support-IPv6-node-registration.patch
+# Fedora specific patch
+#   Quickfix for cmpxchg8b inline asm when pic and gcc >= 5.0 is
+Patch10: otp-0010-Quickfix-for-cmpxchg8b-inline-asm-when-pic-and-gcc-5.patch
 # end of autogenerated patch tag list
 
 BuildRequires:	flex
@@ -901,6 +904,7 @@ Erlang mode for XEmacs (source lisp files).
 %patch7 -p1 -b .Split_off_webtool_dependency_from_tools
 %patch8 -p1 -b .Add_patch_to_crash_dump_on_large_distribution
 %patch9 -p1 -b .epmd_support_IPv6_node_registration
+%patch10 -p1 -b .Quickfix_for_cmpxchg8b_inline_asm_when_pic_and_gcc_5
 # end of autogenerated prep patch list
 
 # FIXME we should come up with a better solution
@@ -921,7 +925,8 @@ ERL_FLAGS="${RPM_OPT_FLAGS} -mcpu=ultrasparc -fno-strict-aliasing"
 %ifarch %{ix86}
 # We have to disable optimizations for Intel Atom
 # See https://bugzilla.redhat.com/1240487#c13
-ERL_FLAGS="${RPM_OPT_FLAGS/-mtune=atom/-mtune=generic} -fno-strict-aliasing"
+#ERL_FLAGS="${RPM_OPT_FLAGS/-mtune=atom/-mtune=generic} -fno-strict-aliasing"
+ERL_FLAGS="${RPM_OPT_FLAGS} -fno-strict-aliasing"
 %else
 ERL_FLAGS="${RPM_OPT_FLAGS} -fno-strict-aliasing"
 %endif
@@ -968,7 +973,7 @@ make
 %if %{with doc}
 # should use FOP_OPTS after #832323 is resolved
 %ifnarch ppc %{power64}
-export BASE_OPTIONS=-Xmx512m
+export BASE_OPTIONS=-Xmx1024m
 %else
 export BASE_OPTIONS=-Xmx1536m
 %endif
@@ -2234,6 +2239,11 @@ useradd -r -g epmd -d /tmp -s /sbin/nologin \
 
 
 %changelog
+* Wed Feb 10 2016 Peter Lemenkov <lemenkov@gmail.com> - 18.2.3-2
+- Workaround for broken cmpxchg8b inlining on ix86 (rhbz#1240487)
+- Don't use generic optimization on ix86
+- Increase memory up to 1024 mbytes while generating docs on non-ppc arches
+
 * Tue Feb  9 2016 Peter Lemenkov <lemenkov@gmail.com> - 18.2.3-1
 - Ver. 18.2.3
 
diff --git a/otp-0010-Quickfix-for-cmpxchg8b-inline-asm-when-pic-and-gcc-5.patch b/otp-0010-Quickfix-for-cmpxchg8b-inline-asm-when-pic-and-gcc-5.patch
new file mode 100644
index 0000000..cc8a9d1
--- /dev/null
+++ b/otp-0010-Quickfix-for-cmpxchg8b-inline-asm-when-pic-and-gcc-5.patch
@@ -0,0 +1,27 @@
+From: Rickard Green <rickard@erlang.org>
+Date: Tue, 9 Feb 2016 18:23:26 +0100
+Subject: [PATCH] Quickfix for cmpxchg8b inline asm when pic and gcc >= 5.0 is
+ used
+
+
+diff --git a/erts/include/internal/i386/ethr_dw_atomic.h b/erts/include/internal/i386/ethr_dw_atomic.h
+index e8c4119..caba633 100644
+--- a/erts/include/internal/i386/ethr_dw_atomic.h
++++ b/erts/include/internal/i386/ethr_dw_atomic.h
+@@ -115,6 +115,8 @@ ethr_native_dw_atomic_addr(ethr_native_dw_atomic_t *var)
+     return (ethr_sint_t *) ETHR_DW_NATMC_MEM__(var);
+ }
+ 
++#if !ETHR_AT_LEAST_GCC_VSN__(5, 0, 0)
++
+ #if ETHR_SIZEOF_PTR == 4 && defined(__PIC__) && __PIC__
+ /*
+  * When position independent code is used in 32-bit mode, the EBX register
+@@ -138,6 +140,7 @@ ethr_native_dw_atomic_addr(ethr_native_dw_atomic_t *var)
+ #  endif
+ #endif
+ 
++#endif /* < gcc-5.0 */
+ 
+ #define ETHR_HAVE_ETHR_NATIVE_DW_ATOMIC_CMPXCHG_MB
+