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From 3a80bc50c949760f7159b59ba30a70f95c223448 Mon Sep 17 00:00:00 2001
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From: Alejandro Lucero <alejandro.lucero@netronome.com>
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Date: Tue, 10 Jul 2018 18:25:48 +0100
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Subject: [1/5] mem: add function for checking memsegs IOVAs addresses
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A device can suffer addressing limitations. This functions checks
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memsegs have iovas within the supported range based on dma mask.
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PMD should use this during initialization if supported devices
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suffer addressing limitations, returning an error if this function
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returns memsegs out of range.
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Another potential usage is for emulated IOMMU hardware with addressing
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limitations.
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Applicable to v17.11.3 only.
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Signed-off-by: Alejandro Lucero <alejandro.lucero@netronome.com>
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Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
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Acked-by: Eelco Chaudron <echaudro@redhat.com>
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---
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lib/librte_eal/common/eal_common_memory.c | 48 ++++++++++++++++++++++++++++++
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lib/librte_eal/common/include/rte_memory.h | 3 ++
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lib/librte_eal/rte_eal_version.map | 1 +
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3 files changed, 52 insertions(+)
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diff --git a/lib/librte_eal/common/eal_common_memory.c b/lib/librte_eal/common/eal_common_memory.c
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index fc6c44d..00ab393 100644
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--- a/lib/librte_eal/common/eal_common_memory.c
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+++ b/lib/librte_eal/common/eal_common_memory.c
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@@ -109,6 +109,54 @@ rte_dump_physmem_layout(FILE *f)
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}
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}
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+#if defined(RTE_ARCH_X86)
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+#define X86_VA_WIDTH 47 /* From Documentation/x86/x86_64/mm.txt */
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+#define MAX_DMA_MASK_BITS X86_VA_WIDTH
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+#else
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+/* 63 bits is good enough for a sanity check */
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+#define MAX_DMA_MASK_BITS 63
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+#endif
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+
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+/* check memseg iovas are within the required range based on dma mask */
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+int
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+rte_eal_check_dma_mask(uint8_t maskbits)
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+{
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+
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+ const struct rte_mem_config *mcfg;
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+ uint64_t mask;
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+ int i;
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+
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+ /* sanity check */
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+ if (maskbits > MAX_DMA_MASK_BITS) {
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+ RTE_LOG(INFO, EAL, "wrong dma mask size %u (Max: %u)\n",
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+ maskbits, MAX_DMA_MASK_BITS);
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+ return -1;
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+ }
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+
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+ /* create dma mask */
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+ mask = ~((1ULL << maskbits) - 1);
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+
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+ /* get pointer to global configuration */
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+ mcfg = rte_eal_get_configuration()->mem_config;
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+
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+ for (i = 0; i < RTE_MAX_MEMSEG; i++) {
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+ if (mcfg->memseg[i].addr == NULL)
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+ break;
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+
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+ if (mcfg->memseg[i].iova & mask) {
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+ RTE_LOG(INFO, EAL,
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+ "memseg[%d] iova %"PRIx64" out of range:\n",
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+ i, mcfg->memseg[i].iova);
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+
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+ RTE_LOG(INFO, EAL, "\tusing dma mask %"PRIx64"\n",
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+ mask);
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+ return -1;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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/* return the number of memory channels */
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unsigned rte_memory_get_nchannel(void)
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{
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diff --git a/lib/librte_eal/common/include/rte_memory.h b/lib/librte_eal/common/include/rte_memory.h
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index 80a8fc0..b2a0168 100644
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--- a/lib/librte_eal/common/include/rte_memory.h
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+++ b/lib/librte_eal/common/include/rte_memory.h
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@@ -209,6 +209,9 @@ unsigned rte_memory_get_nchannel(void);
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*/
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unsigned rte_memory_get_nrank(void);
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+/* check memsegs iovas are within a range based on dma mask */
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+int rte_eal_check_dma_mask(uint8_t maskbits);
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+
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/**
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* Drivers based on uio will not load unless physical
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* addresses are obtainable. It is only possible to get
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diff --git a/lib/librte_eal/rte_eal_version.map b/lib/librte_eal/rte_eal_version.map
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index f4f46c1..aa6cf87 100644
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--- a/lib/librte_eal/rte_eal_version.map
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+++ b/lib/librte_eal/rte_eal_version.map
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@@ -184,6 +184,7 @@ DPDK_17.11 {
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rte_eal_create_uio_dev;
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rte_bus_get_iommu_class;
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+ rte_eal_check_dma_mask;
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rte_eal_has_pci;
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rte_eal_iova_mode;
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rte_eal_mbuf_default_mempool_ops;
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--
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1.8.3.1
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