Blame SOURCES/valgrind-3.14.0-add-vector-h.patch

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diff --git a/none/tests/s390x/vector.h b/none/tests/s390x/vector.h
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new file mode 100644
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index 000000000..a6538b43f
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--- /dev/null
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+++ b/none/tests/s390x/vector.h
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@@ -0,0 +1,173 @@
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+#ifndef S390_TEST_VECTOR_H
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+#define S390_TEST_VECTOR_H
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+
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+#include "stdbool.h"
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+#include "stdint.h"
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+#include "stdio.h"
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+#include "string.h"
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+
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+/* How many times should every test be executed? */
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+#define S390_TEST_COUNT 10
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+
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+/* Test the instruction exactly one time. */
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+#define test_once(insn) test_##insn()
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+
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+/* Test the instruction exactly S390_TEST_COUNT times.
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+   "..." arguments specifies code which must be executed after each tests
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+ */
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+#define test(insn, ...) \
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+   for(iteration = 0; iteration < S390_TEST_COUNT; iteration++) \
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+     { test_##insn(); \
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+        __VA_ARGS__; \
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+     }
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+
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+#ifdef __GNUC__
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+/* GCC complains about __int128 with -pedantic */
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+/* Hope that we will have int128_t in C standard someday. */
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+#pragma GCC diagnostic ignored "-Wpedantic"
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+#endif
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+
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+typedef union {
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+   uint8_t u8[16];
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+   int8_t s8[16];
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+
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+   uint16_t u16[8];
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+   int16_t s16[8];
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+
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+   uint32_t u32[4];
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+   int32_t s32[4];
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+
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+   uint64_t u64[2];
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+   int64_t s64[2];
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+
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+   unsigned __int128 u128[1];
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+   __int128 s128[1];
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+} V128;
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+
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+void print_hex(const V128 value) {
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+   printf("%016lx | %016lx\n", value.u64[0], value.u64[1]);
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+}
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+
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+void print_uint64_t(const uint64_t value) {
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+   printf("%016lx\n", value);
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+}
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+
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+uint8_t random_element ( void )
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+{
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+   static uint32_t seed = 80021;
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+   seed = 1103515245 * seed + 12345;
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+   return (seed >> 17) & 0xFF;
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+}
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+
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+void random_V128 (V128 *block)
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+{
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+   size_t i;
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+   for(i = 0; i < 16; i++)
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+   {
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+      block->u8[i] = random_element();
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+   }
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+}
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+
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+uint64_t random_uint64_t()
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+{
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+   uint64_t result = 0ULL;
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+   uint8_t  *ptr = (uint8_t *) &result;
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+   size_t i;
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+   for(i = 0; i < 8; i++)
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+   {
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+      ptr[i] = random_element();
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+   }
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+
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+   return result;
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+}
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+
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+/* Memory pool with some random data. Used for some instruction which need
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+   an address to some memory chunk.
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+   Pool should be large enough for all insn that use it.
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+   (64 bytes and aligning are needed by VLBB insn)
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+
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+   Content of this pool must be updated every iteration but not from test to test.
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+*/
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+uint8_t random_memory_pool[64] __attribute__ ((aligned (64)));
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+void randomize_memory_pool()
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+{
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+   size_t i;
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+   for(i = 0; i < sizeof(random_memory_pool) / sizeof(random_memory_pool[0]); i++)
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+   {
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+      random_memory_pool[i] = random_element();
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+   }
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+}
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+
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+/* Define a test for input. Takes up theese arguments:
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+      insn        -- instruction name
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+      asm_string  -- line (or multiple lines) with asm mnemonics for instruction
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+
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+   The folowing registers layout expected:
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+      ("r" for register form and m for memory form)
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+      v1         -- vector arg1
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+      v2         -- vector arg2
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+      v3         -- vector arg3
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+      v5         -- vector result
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+      [{r,m}_arg1]   -- integer arg1
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+      [{r,m}_arg2]   -- integer arg2
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+      [{r,m}_arg3]   -- integer arg3
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+      [{r,m}_result]      -- integer result
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+      [{r,m}_memory_pool] -- address of random memory pool. Usefull for some instructions
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+
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+*/
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+#define s390_test_generate(insn, asm_string) \
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+static void test_##insn() \
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+{ \
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+   V128 v_result = { .u64 = {0ULL, 0ULL} }; \
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+   V128 v_arg1; \
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+   V128 v_arg2; \
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+   V128 v_arg3; \
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+   uint64_t r_arg1 = random_uint64_t(); \
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+   uint64_t r_arg2 = random_uint64_t(); \
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+   uint64_t r_arg3 = random_uint64_t(); \
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+   uint64_t r_result = 0ULL; \
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+    \
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+   random_V128(&v_arg1); \
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+   random_V128(&v_arg2); \
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+   random_V128(&v_arg3); \
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+    \
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+   __asm__ volatile( \
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+       "vl  %%v1, %[v_arg1]\n" \
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+       "vl  %%v2, %[v_arg2]\n" \
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+       "vl  %%v3, %[v_arg3]\n" \
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+       "vone %%v5\n" \
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+       asm_string "\n"\
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+       "vst %%v5, %[v_result]\n" \
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+       "vst %%v1, %[v_arg1]\n" \
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+       "vst %%v2, %[v_arg2]\n" \
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+       "vst %%v3, %[v_arg3]\n" \
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+       : [v_result]      "=m" (v_result), \
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+         [m_result]      "=m" (r_result), \
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+         [r_result]      "+d" (r_result), \
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+         [r_arg1]        "+d" (r_arg1), \
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+         [r_arg2]        "+d" (r_arg2), \
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+         [r_arg3]        "+d" (r_arg3) \
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+       : [v_arg1]        "m" (v_arg1), \
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+         [v_arg2]        "m" (v_arg2), \
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+         [v_arg3]        "m" (v_arg3), \
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+         [m_arg1]        "m" (r_arg1), \
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+         [m_arg2]        "m" (r_arg2), \
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+         [m_arg3]        "m" (r_arg3), \
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+         [r_memory_pool] "r" (random_memory_pool), \
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+         [m_memory_pool] "m" (random_memory_pool) \
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+       : "memory", "cc", \
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+         "r1", "r2", "r3", "r5", \
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+         "v1", "v2", "v3", "v5"); \
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+    \
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+   printf("insn %s:\n", #insn); \
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+   printf("  v_arg1   = "); print_hex(v_arg1); \
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+   printf("  v_arg2   = "); print_hex(v_arg2); \
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+   printf("  v_arg3   = "); print_hex(v_arg3); \
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+   printf("  v_result = "); print_hex(v_result); \
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+   printf("  r_arg1   = "); print_uint64_t(r_arg1); \
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+   printf("  r_arg2   = "); print_uint64_t(r_arg2); \
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+   printf("  r_arg3   = "); print_uint64_t(r_arg3); \
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+   printf("  r_result = "); print_uint64_t(r_result); \
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+}
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+
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+#endif