Blame SOURCES/gcc8-rh1760208-2.patch

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commit c2894790640da2c0761924ff1b06efddbdfa031e
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Author: Segher Boessenkool <segher@kernel.crashing.org>
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Date:   Fri Aug 30 16:15:39 2019 +0200
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    backport: re PR target/91481 (POWER9 "DARN" RNG intrinsic produces repeated output (CVE-2019-15847))
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            Backport from trunk
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            2019-08-22  Segher Boessenkool  <segher@kernel.crashing.org>
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            PR target/91481
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            * config/rs6000/rs6000.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32,
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            and UNSPEC_DARN_RAW.
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            (unspecv): New enumerator values UNSPECV_DARN, UNSPECV_DARN_32, and
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            UNSPECV_DARN_RAW.
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            (darn_32): Use an unspec_volatile, and UNSPECV_DARN_32.
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            (darn_raw): Use an unspec_volatile, and UNSPECV_DARN_RAW.
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            (darn): Use an unspec_volatile, and UNSPECV_DARN.
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    From-SVN: r275181
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--- gcc/config/rs6000/rs6000.md
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+++ gcc/config/rs6000/rs6000.md
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@@ -136,9 +136,6 @@
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    UNSPEC_LSQ
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    UNSPEC_FUSION_GPR
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    UNSPEC_STACK_CHECK
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-   UNSPEC_DARN
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-   UNSPEC_DARN_32
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-   UNSPEC_DARN_RAW
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    UNSPEC_CMPRB
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    UNSPEC_CMPRB2
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    UNSPEC_CMPEQB
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@@ -168,6 +165,9 @@
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    UNSPECV_EH_RR		; eh_reg_restore
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    UNSPECV_ISYNC		; isync instruction
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    UNSPECV_MFTB			; move from time base
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+   UNSPECV_DARN			; darn 1 (deliver a random number)
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+   UNSPECV_DARN_32		; darn 2
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+   UNSPECV_DARN_RAW		; darn 0
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    UNSPECV_NLGR			; non-local goto receiver
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    UNSPECV_MFFS			; Move from FPSCR
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    UNSPECV_MTFSF		; Move to FPSCR Fields
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@@ -14611,21 +14611,21 @@
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 (define_insn "darn_32"
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   [(set (match_operand:SI 0 "register_operand" "=r")
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-        (unspec:SI [(const_int 0)] UNSPEC_DARN_32))]
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+        (unspec_volatile:SI [(const_int 0)] UNSPECV_DARN_32))]
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   "TARGET_P9_MISC"
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   "darn %0,0"
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   [(set_attr "type" "integer")])
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 (define_insn "darn_raw"
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   [(set (match_operand:DI 0 "register_operand" "=r")
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-        (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))]
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+        (unspec_volatile:DI [(const_int 0)] UNSPECV_DARN_RAW))]
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   "TARGET_P9_MISC && TARGET_64BIT"
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   "darn %0,2"
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   [(set_attr "type" "integer")])
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 (define_insn "darn"
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   [(set (match_operand:DI 0 "register_operand" "=r")
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-        (unspec:DI [(const_int 0)] UNSPEC_DARN))]
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+        (unspec_volatile:DI [(const_int 0)] UNSPECV_DARN))]
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   "TARGET_P9_MISC && TARGET_64BIT"
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   "darn %0,1"
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   [(set_attr "type" "integer")])