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Backport of 44f814ce5066f10a3bed29c45d10e0d38f4fa433
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+2014-04-15 Marcus Shawcroft <marcus.shawcroft@arm.com>
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+
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+ * (elfNN_aarch64_tls_relax): Fix instruction mask.
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+
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+2014-04-15 Marcus Shawcroft <marcus.shawcroft@arm.com>
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+
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+ * ld-aarch64/tls-relax-gdesc-ie.s (var): Adjust test case
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+ to include all 5 bits of LDR destination register.
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diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
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index c20690c..38b3721 100644
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--- a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
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+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
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@@ -4,7 +4,7 @@ var:
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.word 2
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.text
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adrp x0, :tlsdesc:var
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- ldr x1, [x0, #:tlsdesc_lo12:var]
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+ ldr x17, [x0, #:tlsdesc_lo12:var]
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add x0, x0, :tlsdesc_lo12:var
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.tlsdesccall var
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blr x1
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--- a/bfd/elf64-aarch64.c.orig 2014-04-16 15:27:40.768747791 -0400
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+++ b/bfd/elf64-aarch64.c 2014-04-16 15:31:14.216712249 -0400
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@@ -4171,7 +4171,7 @@ elf64_aarch64_tls_relax (struct elf64_aa
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ldr xd, [x0, #:tlsdesc_lo12:var] => ldr x0, [x0, #:gottprel_lo12:var]
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*/
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insn = bfd_getl32 (contents + rel->r_offset);
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- insn &= 0xfffffff0;
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+ insn &= 0xffffffe0;
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bfd_putl32 (insn, contents + rel->r_offset);
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return bfd_reloc_continue;
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}
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