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From dce732e9fe47b44d1a985d10a0eb97aac6afa28e Mon Sep 17 00:00:00 2001
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From: Andreas Arnez <arnez@linux.ibm.com>
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Date: Wed, 25 Mar 2020 20:11:19 +0100
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Subject: [PATCH 6/8] Add IBM z14 support
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Add general support for IBM z14. Also detect and handle the vector
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enhancements facility 1, which specifically adds single-precision FP
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arithmetic for vectors.
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---
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CONFIG/include/atlconf.h | 14 ++++----
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CONFIG/src/Makefile | 6 ++++
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CONFIG/src/atlcomp.txt | 4 +++
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CONFIG/src/backend/Make.ext | 4 ++-
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CONFIG/src/backend/archinfo_linux.c | 3 +-
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CONFIG/src/backend/probe_vxz2.c | 12 +++++++
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CONFIG/src/probe_comp.c | 3 +-
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include/atlas_prefetch.h | 3 +-
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include/atlas_simd.h | 53 +++++++++++++++++++++++++++++
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9 files changed, 91 insertions(+), 11 deletions(-)
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create mode 100644 CONFIG/src/backend/probe_vxz2.c
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diff --git a/CONFIG/include/atlconf.h b/CONFIG/include/atlconf.h
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index e51d56d..3828fdb 100644
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--- a/CONFIG/include/atlconf.h
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+++ b/CONFIG/include/atlconf.h
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@@ -25,11 +25,11 @@ enum ARCHFAM {AFOther=0, AFPPC, AFSPARC, AFALPHA, AFX86, AFIA64, AFMIPS,
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* Corei3EP: v3 Haswell, E5-26XX
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* Corei4: skylake
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*/
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-#define NMACH 62
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+#define NMACH 63
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static char *machnam[NMACH] =
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{"UNKNOWN", "PPCG4", "PPCG5", "POWER3", "POWER4", "POWER5",
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"POWER6", "POWER7", "POWER8", "POWERe6500",
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- "IBMz9", "IBMz10", "IBMz196", "IBMz12", "IBMz13",
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+ "IBMz9", "IBMz10", "IBMz196", "IBMz12", "IBMz13", "IBMz14",
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"x86x87", "x86SSE1", "x86SSE2", "x86SSE3",
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"P5", "P5MMX", "PPRO", "PII", "PIII", "PM", "CoreSolo",
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"CoreDuo", "Core2Solo", "Core2", "Corei1", "Corei2", "Corei3",
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@@ -42,7 +42,7 @@ static char *machnam[NMACH] =
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"ARM64xgene1", "ARM64a53", "ARM64a57"};
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enum MACHTYPE {MACHOther, PPCG4, PPCG5, IbmPwr3, IbmPwr4, IbmPwr5,
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IbmPwr6, IbmPwr7, IbmPwr8, Pwre6500,
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- IbmZ9, IbmZ10, IbmZ196, IbmZ12, IbmZ13, /* s390(x) in Linux */
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+ IbmZ9, IbmZ10, IbmZ196, IbmZ12, IbmZ13, IbmZ14, /* s390(x) */
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x86x87, x86SSE1, x86SSE2, x86SSE3, /* generic targets */
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IntP5, IntP5MMX, IntPPRO, IntPII, IntPIII, IntPM, IntCoreS,
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IntCoreDuo, IntCore2Solo, IntCore2, IntCorei1, IntCorei2,
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@@ -82,7 +82,7 @@ enum MACHTYPE {MACHOther, PPCG4, PPCG5, IbmPwr3, IbmPwr4, IbmPwr5,
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#define MachIsARM64(mach_) \
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( (mach_) >= ARM64xg && || (mach_) <= ARM64a57)
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#define MachIsS390(mach_) \
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- ( (mach_) >= IbmZ9 && (mach_) <= IbmZ13 )
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+ ( (mach_) >= IbmZ9 && (mach_) <= IbmZ14 )
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static char *f2c_namestr[5] = {"UNKNOWN","Add_", "Add__", "NoChange", "UpCase"};
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@@ -96,13 +96,13 @@ enum F2CNAME {f2c_NamErr=0, f2c_Add_, f2c_Add__, f2c_NoChange, f2c_UpCase};
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enum F2CINT {f2c_IntErr=0, FintCint, FintClong, FintClonglong, FintCshort};
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enum F2CSTRING {f2c_StrErr=0, fstrSun, fstrCray, fstrStructVal, fstrStructPtr};
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-#define NISA 15
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+#define NISA 16
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static char *ISAXNAM[NISA] =
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- {"", "VSX", "VXZ", "AltiVec",
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+ {"", "VSX", "VXZ2", "VXZ", "AltiVec",
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"AVXMAC", "AVXFMA4", "AVX", "SSE3", "SSE2", "SSE1", "3DNow",
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"FPV3D2MACNEON", "FPV3D16MACNEON", "FPV3D32MAC", "FPV3D16MAC"};
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enum ISAEXT
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- {ISA_None=0, ISA_VSX, ISA_VXZ, ISA_AV,
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+ {ISA_None=0, ISA_VSX, ISA_VXZ2, ISA_VXZ, ISA_AV,
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ISA_AVXMAC, ISA_AVXFMA4, ISA_AVX, ISA_SSE3, ISA_SSE2, ISA_SSE1, ISA_3DNow,
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ISA_NEON, ISA_NEON16, ISA_VFP3D32MAC, ISA_VFP3D16MAC};
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diff --git a/CONFIG/src/Makefile b/CONFIG/src/Makefile
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index 212b9d7..782a4cf 100644
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--- a/CONFIG/src/Makefile
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+++ b/CONFIG/src/Makefile
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@@ -158,6 +158,12 @@ IRun_NEON :
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$(MAKE) $(atlrun) atldir=$(mydir) exe=xprobe_neon args="$(args)" \
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redir=config0.out
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- cat config0.out
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+IRun_VXZ2 :
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+ $(CC) $(CCFLAGS) -march=native -mvx -mzvector -o xprobe_vxz2 \
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+ $(SRCdir)/backend/probe_svec.c $(SRCdir)/backend/probe_vxz2.c
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+ $(MAKE) $(atlrun) atldir=$(mydir) exe=xprobe_vxz2 args="$(args)" \
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+ redir=config0.out
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+ - cat config0.out
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IRun_VXZ :
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$(CC) $(CCFLAGS) -march=native -mvx -mzvector -o xprobe_vxz \
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$(SRCdir)/backend/probe_dvec.c $(SRCdir)/backend/probe_vxz.c
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diff --git a/CONFIG/src/atlcomp.txt b/CONFIG/src/atlcomp.txt
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index 2ac71cf..2cfacc2 100644
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--- a/CONFIG/src/atlcomp.txt
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+++ b/CONFIG/src/atlcomp.txt
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@@ -250,6 +250,10 @@ MACH=IBMz13 OS=ALL LVL=1000 COMPS=smc,dmc,skc,dkc,icc,xcc,gcc
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'gcc' '-march=z13 -mtune=z13 -O2'
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MACH=IBMz13 OS=ALL LVL=1000 COMPS=f77
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'gfortran' '-march=z13 -mtune=z13 -O2'
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+MACH=IBMz14 OS=ALL LVL=1000 COMPS=smc,dmc,skc,dkc,icc,xcc,gcc
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+ 'gcc' '-march=z14 -mtune=z14 -O2'
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+MACH=IBMz14 OS=ALL LVL=1000 COMPS=f77
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+ 'gfortran' '-march=z14 -mtune=z14 -O2'
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#
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# Windows defaults ; need to make SSE/SSE2 arch dep.
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#
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diff --git a/CONFIG/src/backend/Make.ext b/CONFIG/src/backend/Make.ext
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index 4743353..794babf 100644
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--- a/CONFIG/src/backend/Make.ext
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+++ b/CONFIG/src/backend/Make.ext
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@@ -39,7 +39,7 @@ files = archinfo_aix.c archinfo_freebsd.c archinfo_irix.c archinfo_linux.c \
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probe_gas_mips.S probe_gas_parisc.S probe_gas_ppc.S probe_gas_s390.S \
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probe_gas_sparc.S probe_gas_wow64.S probe_gas_x8632.S \
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probe_gas_x8664.S probe_smac.c probe_svec.c probe_this_asm.c \
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- probe_vxz.c
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+ probe_vxz2.c probe_vxz.c
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all : $(files)
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@@ -107,6 +107,8 @@ flibchkF.f : $(basf)
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$(extF) -b $(basf) -o flibchkF.f rout=flibchkF.f
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probe_arm32_FPABI.c : $(basf)
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$(extC) -b $(basf) -o probe_arm32_FPABI.c rout=probe_arm32_FPABI
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+probe_vxz2.c : $(basf)
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+ $(extC) -b $(basf) -o probe_vxz2.c rout=probe_vxz2
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probe_vxz.c : $(basf)
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$(extC) -b $(basf) -o probe_vxz.c rout=probe_vxz
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probe_aff_SETAFFNP.c : $(basf)
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diff --git a/CONFIG/src/backend/archinfo_linux.c b/CONFIG/src/backend/archinfo_linux.c
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index cdcee92..ed6f476 100644
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--- a/CONFIG/src/backend/archinfo_linux.c
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+++ b/CONFIG/src/backend/archinfo_linux.c
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@@ -336,7 +336,8 @@ enum MACHTYPE ProbeArch()
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else if (strstr(res, "2817") || strstr(res, "2818")) mach = IbmZ196;
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else if (strstr(res, "2827") || strstr(res, "2828")) mach = IbmZ12;
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else if (strstr(res, "2964") || strstr(res, "2965")) mach = IbmZ13;
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- else mach = IbmZ13; /* looks risky to me, but IBM folks did it */
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+ else if (strstr(res, "3906") || strstr(res, "3907")) mach = IbmZ14;
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+ else mach = IbmZ14; /* looks risky to me, but IBM folks did it */
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free(res);
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}
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break;
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diff --git a/CONFIG/src/backend/probe_vxz2.c b/CONFIG/src/backend/probe_vxz2.c
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new file mode 100644
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index 0000000..a69d92d
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--- /dev/null
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+++ b/CONFIG/src/backend/probe_vxz2.c
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@@ -0,0 +1,12 @@
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+#include <vecintrin.h>
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+void do_vsum(float *z, float *x, float *y) // RETURNS: z = x + y
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+{
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+ vector float vx, vy;
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+ vx = (vector float) {x[0], x[1], x[2], x[3]};
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+ vy = (vector float) {y[0], y[1], y[2], y[3]};
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+ vy += vx;
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+ z[0] = vy[0];
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+ z[1] = vy[1];
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+ z[2] = vy[2];
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+ z[3] = vy[3];
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+}
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diff --git a/CONFIG/src/probe_comp.c b/CONFIG/src/probe_comp.c
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index 1652e24..857ea82 100644
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--- a/CONFIG/src/probe_comp.c
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+++ b/CONFIG/src/probe_comp.c
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@@ -452,7 +452,7 @@ COMPNODE **GetDefaultComps(enum OSTYPE OS, enum MACHTYPE arch, int verb,
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vp = "-mavx2 -mfma";
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else if (vecexts & (1<
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vp = "-mvsx";
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- else if (vecexts & (1<
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+ else if ((vecexts & (1<
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vp = "-mvx -mzvector";
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else if (vecexts & (1<
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vp = "-maltivec";
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@@ -1207,6 +1207,7 @@ void GetBestGccVers(enum OSTYPE OS, enum MACHTYPE arch,
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{
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case IbmZ12:
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case IbmZ13:
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+ case IbmZ14:
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case IntCorei3:
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case IntCorei4:
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case IntCorei2:
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diff --git a/include/atlas_prefetch.h b/include/atlas_prefetch.h
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index e7988a7..fa426ac 100644
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--- a/include/atlas_prefetch.h
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+++ b/include/atlas_prefetch.h
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@@ -155,7 +155,8 @@
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#define ATL_L1LS 32
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#define ATL_L2LS 64
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#elif defined(ATL_ARCH_IBMz196) || defined(ATL_ARCH_IBMz10) || \
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- defined(ATL_ARCH_IBMzEC12) || defined(ATL_ARCH_IBMz13)
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+ defined(ATL_ARCH_IBMzEC12) || defined(ATL_ARCH_IBMz13) || \
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+ defined(ATL_ARCH_IbmZ14)
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#define ATL_pfl1R(mem) __builtin_prefetch(mem, 0, 3)
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#define ATL_pfl1W(mem) __builtin_prefetch(mem, 1, 3)
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#define ATL_GOT_L1PREFETCH
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diff --git a/include/atlas_simd.h b/include/atlas_simd.h
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index f171933..eb75577 100644
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--- a/include/atlas_simd.h
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+++ b/include/atlas_simd.h
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@@ -68,6 +68,11 @@
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((defined(DREAL) || defined(DCPLX)) && ATL_VLEN != 2)
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#define ATL_FRCGNUVEC
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#endif
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+ #elif defined(ATL_VXZ2)
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+ #if ((defined(SREAL) || defined(SCPLX)) && ATL_VLEN != 4) || \
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+ ((defined(DREAL) || defined(DCPLX)) && ATL_VLEN != 2)
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+ #define ATL_FRCGNUVEC
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+ #endif
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#elif defined(ATL_VXZ)
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#if ATL_VLEN != 2
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#define ATL_FRCGNUVEC
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@@ -113,6 +118,12 @@
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#else
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#define ATL_VLEN 2
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#endif
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+ #elif defined(ATL_VXZ2)
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+ #if defined(SREAL) || defined(SCPLX)
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+ #define ATL_VLEN 4
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+ #else
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+ #define ATL_VLEN 2
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+ #endif
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#elif defined(ATL_VXZ)
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#define ATL_VLEN 2
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#elif defined(ATL_NEON)
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@@ -376,6 +387,48 @@
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#define ATL_vsplat0(d_, s_) d_ = vec_splat(s_, 0)
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#define ATL_vsplat1(d_, s_) d_ = vec_splat(s_, 1)
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#endif
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+#elif defined(ATL_VXZ2)
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+ #include <vecintrin.h>
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+
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+ #define ATL_VPERMI(s_, t_, i_) \
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+ ((ATL_VTYPE) vec_permi((vector double) s_, (vector double) t_, i_))
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+
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+ #if defined(SREAL) || defined(SCPLX)
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+ #define ATL_VTYPE vector float
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+ #if ATL_VLEN != 4
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+ #error "VSXZ2 supports only VLEN = 4 for floats!"
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+ #endif
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+ #define ATL_vvrsum4(s0_, s1_, s2_, s3_) \
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+ { ATL_VTYPE t0_, t1_; \
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+ t0_ = vec_mergeh(s0_, s1_) + vec_mergel(s0_, s1_); \
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+ t1_ = vec_mergeh(s2_, s3_) + vec_mergel(s2_, s3_); \
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+ s0_ = ATL_VPERMI(t0_, t1_, 0) + ATL_VPERMI(t0_, t1_, 3); \
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4509de |
+ }
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+ #define ATL_vsplat2(d_, s_) d_ = vec_splat(s_, 2)
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+ #define ATL_vsplat3(d_, s_) d_ = vec_splat(s_, 3)
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+ #else /* double precision */
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+ #define ATL_VTYPE vector double
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+ #if ATL_VLEN != 2
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+ #error "VSXZ2 supports only VLEN = 2 for doubles!"
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+ #endif
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+ #define ATL_vvrsum1(s0_) \
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+ { s0_ = vec_mergeh(s0_, s0_) + vec_mergel(s0_, s0_); }
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+ #define ATL_vvrsum2(s0_, s1_) \
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+ { s0_ = vec_mergeh(s0_, s1_) + vec_mergel(s0_, s1_); }
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+ #endif
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+ #define ATL_vld(v_, p_) v_ = *(ATL_VTYPE *)(p_)
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+ #define ATL_vst(p_, v_) *(ATL_VTYPE *)(p_) = v_
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+ #define ATL_vzero(v_) v_ = vec_splats((TYPE)0.0)
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+ #define ATL_vcopy(d_, s_) d_ = s_
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+ #define ATL_vbcast(v_, p_) v_ = vec_splats(*((TYPE*)(p_)))
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+ #define ATL_vuld(v_, p_) v_ = vec_xl(0, (TYPE *)(p_))
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+ #define ATL_vust(p_, v_) vec_xst(v_, 0, (TYPE *)(p_))
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+ #define ATL_vadd(d_, s1_, s2_) d_ = s1_ + s2_
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+ #define ATL_vsub(d_, s1_, s2_) d_ = s1_ - s2_
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+ #define ATL_vmul(d_, s1_, s2_) d_ = s1_ * s2_
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+ #define ATL_vmac(d_, s1_, s2_) d_ = __builtin_s390_vec_madd(s1_, s2_, d_)
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+ #define ATL_vsplat0(d_, s_) d_ = vec_splat(s_, 0)
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+ #define ATL_vsplat1(d_, s_) d_ = vec_splat(s_, 1)
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#elif defined(ATL_VXZ)
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#include <vecintrin.h>
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--
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2.23.0
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