|
 |
214d7a |
Patch carried over from the prior iasl package and updated. This allows
|
|
|
214d7a |
for builds on systems requiring aligned memory access. Please see
|
|
|
214d7a |
http://lists.acpica.org/pipermail/devel/2010-July/000159.html. Resolves
|
|
|
214d7a |
BZ#865013 and BZ#856856.
|
|
|
214d7a |
--
|
|
|
214d7a |
|
|
|
214d7a |
Add more platforms to the list of the ones requiring aligned memory access.
|
|
|
214d7a |
Also fix callsites where wrong assumptions where made in terms of aligment.
|
|
|
214d7a |
|
|
|
214d7a |
Signed-off-by: Mattia Dongili <malattia@linux.it>
|
|
|
214d7a |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
214d7a |
---
|
|
|
214d7a |
source/components/executer/exoparg2.c | 12 +++++++++---
|
|
|
214d7a |
source/include/actypes.h | 26 +++++++++++++-------------
|
|
|
214d7a |
3 files changed, 32 insertions(+), 21 deletions(-)
|
|
|
214d7a |
|
|
|
214d7a |
Index: acpica-unix2-20200925/source/components/executer/exoparg2.c
|
|
|
214d7a |
===================================================================
|
|
|
214d7a |
--- acpica-unix2-20200925.orig/source/components/executer/exoparg2.c
|
|
|
214d7a |
+++ acpica-unix2-20200925/source/components/executer/exoparg2.c
|
|
|
214d7a |
@@ -172,6 +172,8 @@ AcpiExOpcode_2A_2T_1R (
|
|
|
214d7a |
ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
|
|
|
214d7a |
ACPI_OPERAND_OBJECT *ReturnDesc1 = NULL;
|
|
|
214d7a |
ACPI_OPERAND_OBJECT *ReturnDesc2 = NULL;
|
|
|
214d7a |
+ UINT64 ReturnValue1 = 0;
|
|
|
214d7a |
+ UINT64 ReturnValue2 = 0;
|
|
|
214d7a |
ACPI_STATUS Status;
|
|
|
214d7a |
|
|
|
214d7a |
|
|
|
214d7a |
@@ -206,8 +208,10 @@ AcpiExOpcode_2A_2T_1R (
|
|
|
214d7a |
Status = AcpiUtDivide (
|
|
|
214d7a |
Operand[0]->Integer.Value,
|
|
|
214d7a |
Operand[1]->Integer.Value,
|
|
|
214d7a |
- &ReturnDesc1->Integer.Value,
|
|
|
214d7a |
- &ReturnDesc2->Integer.Value);
|
|
|
214d7a |
+ &ReturnValue1, &ReturnValue2);
|
|
|
214d7a |
+ ReturnDesc1->Integer.Value = ReturnValue1;
|
|
|
214d7a |
+ ReturnDesc2->Integer.Value = ReturnValue2;
|
|
|
214d7a |
+
|
|
|
214d7a |
if (ACPI_FAILURE (Status))
|
|
|
214d7a |
{
|
|
|
214d7a |
goto Cleanup;
|
|
|
214d7a |
@@ -282,6 +286,7 @@ AcpiExOpcode_2A_1T_1R (
|
|
|
214d7a |
ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
|
|
|
214d7a |
ACPI_OPERAND_OBJECT *ReturnDesc = NULL;
|
|
|
214d7a |
UINT64 Index;
|
|
|
214d7a |
+ UINT64 ReturnValue = 0;
|
|
|
214d7a |
ACPI_STATUS Status = AE_OK;
|
|
|
214d7a |
ACPI_SIZE Length = 0;
|
|
|
214d7a |
|
|
|
214d7a |
@@ -327,7 +332,8 @@ AcpiExOpcode_2A_1T_1R (
|
|
|
214d7a |
Operand[0]->Integer.Value,
|
|
|
214d7a |
Operand[1]->Integer.Value,
|
|
|
214d7a |
NULL,
|
|
|
214d7a |
- &ReturnDesc->Integer.Value);
|
|
|
214d7a |
+ &ReturnValue);
|
|
|
214d7a |
+ ReturnDesc->Integer.Value = ReturnValue;
|
|
|
214d7a |
break;
|
|
|
214d7a |
|
|
|
214d7a |
case AML_CONCATENATE_OP: /* Concatenate (Data1, Data2, Result) */
|
|
|
214d7a |
Index: acpica-unix2-20200925/source/include/actypes.h
|
|
|
214d7a |
===================================================================
|
|
|
214d7a |
--- acpica-unix2-20200925.orig/source/include/actypes.h
|
|
|
214d7a |
+++ acpica-unix2-20200925/source/include/actypes.h
|
|
|
214d7a |
@@ -143,6 +143,19 @@ typedef COMPILER_DEPENDENT_INT64
|
|
|
214d7a |
*/
|
|
|
214d7a |
#define ACPI_THREAD_ID UINT64
|
|
|
214d7a |
|
|
|
214d7a |
+/*
|
|
|
214d7a |
+ * In the case of the Itanium Processor Family (IPF), the hardware does not
|
|
|
214d7a |
+ * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag
|
|
|
214d7a |
+ * to indicate that special precautions must be taken to avoid alignment faults.
|
|
|
214d7a |
+ * (IA64 or ia64 is currently used by existing compilers to indicate IPF.)
|
|
|
214d7a |
+ *
|
|
|
214d7a |
+ * Note: EM64T and other X86-64 processors support misaligned transfers,
|
|
|
214d7a |
+ * so there is no need to define this flag.
|
|
|
214d7a |
+ */
|
|
|
214d7a |
+#if defined (__IA64__) || defined (__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__hppa__) || defined(__arm__)
|
|
|
214d7a |
+#define ACPI_MISALIGNMENT_NOT_SUPPORTED
|
|
|
214d7a |
+#endif
|
|
|
214d7a |
+
|
|
|
214d7a |
|
|
|
214d7a |
/*******************************************************************************
|
|
|
214d7a |
*
|
|
|
214d7a |
@@ -170,20 +183,6 @@ typedef UINT64
|
|
|
214d7a |
#define ACPI_USE_NATIVE_DIVIDE /* Has native 64-bit integer support */
|
|
|
214d7a |
#define ACPI_USE_NATIVE_MATH64 /* Has native 64-bit integer support */
|
|
|
214d7a |
|
|
|
214d7a |
-/*
|
|
|
214d7a |
- * In the case of the Itanium Processor Family (IPF), the hardware does not
|
|
|
214d7a |
- * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED
|
|
|
214d7a |
- * flag to indicate that special precautions must be taken to avoid alignment
|
|
|
214d7a |
- * faults. (IA64 or ia64 is currently used by existing compilers to indicate
|
|
|
214d7a |
- * IPF.)
|
|
|
214d7a |
- *
|
|
|
214d7a |
- * Note: EM64T and other X86-64 processors support misaligned transfers,
|
|
|
214d7a |
- * so there is no need to define this flag.
|
|
|
214d7a |
- */
|
|
|
214d7a |
-#if defined (__IA64__) || defined (__ia64__)
|
|
|
214d7a |
-#define ACPI_MISALIGNMENT_NOT_SUPPORTED
|
|
|
214d7a |
-#endif
|
|
|
214d7a |
-
|
|
|
214d7a |
|
|
|
214d7a |
/*******************************************************************************
|
|
|
214d7a |
*
|