|
 |
4ec855 |
From 04387fbe913b26a3819d711ea91b99be6faa8616 Mon Sep 17 00:00:00 2001
|
|
|
4ec855 |
From: "plai@redhat.com" <plai@redhat.com>
|
|
|
4ec855 |
Date: Tue, 26 Nov 2019 19:36:50 +0000
|
|
|
4ec855 |
Subject: [PATCH 06/11] x86/cpu: Enable MOVDIR64B cpu feature
|
|
|
4ec855 |
|
|
|
4ec855 |
RH-Author: plai@redhat.com
|
|
|
4ec855 |
Message-id: <1574797015-32564-3-git-send-email-plai@redhat.com>
|
|
|
4ec855 |
Patchwork-id: 92691
|
|
|
4ec855 |
O-Subject: [RHEL8.2 qemu-kvm PATCH 2/7] x86/cpu: Enable MOVDIR64B cpu feature
|
|
|
4ec855 |
Bugzilla: 1634827
|
|
|
4ec855 |
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
4ec855 |
RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
4ec855 |
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
|
|
|
4ec855 |
|
|
|
4ec855 |
From: Liu Jingqi <jingqi.liu@intel.com>
|
|
|
4ec855 |
|
|
|
4ec855 |
MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity.
|
|
|
4ec855 |
Direct store is implemented by using write combining (WC) for writing
|
|
|
4ec855 |
data directly into memory without caching the data.
|
|
|
4ec855 |
|
|
|
4ec855 |
The bit definition:
|
|
|
4ec855 |
CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B
|
|
|
4ec855 |
|
|
|
4ec855 |
The release document ref below link:
|
|
|
4ec855 |
https://software.intel.com/sites/default/files/managed/c5/15/\
|
|
|
4ec855 |
architecture-instruction-set-extensions-programming-reference.pdf
|
|
|
4ec855 |
|
|
|
4ec855 |
Cc: Xu Tao <tao3.xu@intel.com>
|
|
|
4ec855 |
Signed-off-by: Liu Jingqi <jingqi.liu@intel.com>
|
|
|
4ec855 |
Message-Id: <1541488407-17045-3-git-send-email-jingqi.liu@intel.com>
|
|
|
4ec855 |
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
4ec855 |
(cherry picked from commit 1c65775ffc2dbd276a8bffe592feba0e186a151c)
|
|
|
4ec855 |
Signed-off-by: Paul Lai <plai@redhat.com>
|
|
|
4ec855 |
|
|
|
4ec855 |
Resolved Conflicts:
|
|
|
4ec855 |
target/i386/cpu.c
|
|
|
4ec855 |
|
|
|
4ec855 |
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
|
|
|
4ec855 |
---
|
|
|
4ec855 |
target/i386/cpu.c | 2 +-
|
|
|
4ec855 |
target/i386/cpu.h | 1 +
|
|
|
4ec855 |
2 files changed, 2 insertions(+), 1 deletion(-)
|
|
|
4ec855 |
|
|
|
4ec855 |
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
|
|
|
4ec855 |
index f2ab558..307b629 100644
|
|
|
4ec855 |
--- a/target/i386/cpu.c
|
|
|
4ec855 |
+++ b/target/i386/cpu.c
|
|
|
4ec855 |
@@ -1022,7 +1022,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
|
4ec855 |
"la57", NULL, NULL, NULL,
|
|
|
4ec855 |
NULL, NULL, "rdpid", NULL,
|
|
|
4ec855 |
NULL, "cldemote", NULL, "movdiri",
|
|
|
4ec855 |
- NULL, NULL, NULL, NULL,
|
|
|
4ec855 |
+ "movdir64b", NULL, NULL, NULL,
|
|
|
4ec855 |
},
|
|
|
4ec855 |
.cpuid = {
|
|
|
4ec855 |
.eax = 7,
|
|
|
4ec855 |
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
|
|
|
4ec855 |
index 6ba0b1e..d33fa8d 100644
|
|
|
4ec855 |
--- a/target/i386/cpu.h
|
|
|
4ec855 |
+++ b/target/i386/cpu.h
|
|
|
4ec855 |
@@ -719,6 +719,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
|
|
|
4ec855 |
#define CPUID_7_0_ECX_RDPID (1U << 22)
|
|
|
4ec855 |
#define CPUID_7_0_ECX_CLDEMOTE (1U << 25) /* CLDEMOTE Instruction */
|
|
|
4ec855 |
#define CPUID_7_0_ECX_MOVDIRI (1U << 27) /* MOVDIRI Instruction */
|
|
|
4ec855 |
+#define CPUID_7_0_ECX_MOVDIR64B (1U << 28) /* MOVDIR64B Instruction */
|
|
|
4ec855 |
|
|
|
4ec855 |
#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
|
|
|
4ec855 |
#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
|
|
|
4ec855 |
--
|
|
|
4ec855 |
1.8.3.1
|
|
|
4ec855 |
|