From e2f14f95ccb04db5f470d3593e2a2f2dc69187d8 Mon Sep 17 00:00:00 2001

From: "plai@redhat.com" <plai@redhat.com>

Date: Mon, 23 Sep 2019 20:40:23 +0200

Subject: [PATCH 07/12] x86: Data structure changes to support MSR based

 features

RH-Author: plai@redhat.com

Message-id: <1569271227-28026-7-git-send-email-plai@redhat.com>

Patchwork-id: 90863

O-Subject: [RHEL7.8 qemu-kvm PATCH v6 06/10] x86: Data structure changes to support MSR based features

Bugzilla: 1709971

RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>

RH-Acked-by: Bandan Das <bsd@redhat.com>

RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>

From: Robert Hoo <robert.hu@linux.intel.com>

Add FeatureWordType indicator in struct FeatureWordInfo.

Change feature_word_info[] accordingly.

Change existing functions that refer to feature_word_info[] accordingly.

Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>

Message-Id: <1539578845-37944-3-git-send-email-robert.hu@linux.intel.com>

[ehabkost: fixed hvf_enabled() case]

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

(cherry picked from commit 07585923485952bf4cb7da563c9f91fecc85d09c)

Signed-off-by: Paul Lai <plai@redhat.com>

Resolved Conflicts:

	target/i386/cpu.c changes to target-i386/cpu.c

	x86_cpu_get_supported_feature_word() updated @ 07585923485

	   dropped hvf_enabled(), tcg_enabled(), and migratable_only checks

Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>

---

 target-i386/cpu.c | 163 +++++++++++++++++++++++++++++++++++++++---------------

 1 file changed, 119 insertions(+), 44 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c

index 838c616..488634c 100644

--- a/target-i386/cpu.c

+++ b/target-i386/cpu.c

@@ -272,89 +272,125 @@ static const char *cpuid_apm_edx_feature_name[] = {

 #define TCG_APM_FEATURES 0

+typedef enum FeatureWordType {

+    CPUID_FEATURE_WORD,

+    MSR_FEATURE_WORD,

+} FeatureWordType;

+

 typedef struct FeatureWordInfo {

+    FeatureWordType type;

     const char **feat_names;

-    uint32_t cpuid_eax;   /* Input EAX for CPUID */

-    bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */

-    uint32_t cpuid_ecx;   /* Input ECX value for CPUID */

-    int cpuid_reg;        /* output register (R_* constant) */

+    union {

+        /* If type==CPUID_FEATURE_WORD */

+        struct {

+            uint32_t eax;   /* Input EAX for CPUID */

+            bool needs_ecx; /* CPUID instruction uses ECX as input */

+            uint32_t ecx;   /* Input ECX value for CPUID */

+            int reg;        /* output register (R_* constant) */

+        } cpuid;

+        /* If type==MSR_FEATURE_WORD */

+        struct {

+            uint32_t index;

+            struct {   /*CPUID that enumerate this MSR*/

+                FeatureWord cpuid_class;

+                uint32_t    cpuid_flag;

+            } cpuid_dep;

+        } msr;

+    };

     uint32_t tcg_features; /* Feature flags supported by TCG */

 } FeatureWordInfo;

 static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {

     [FEAT_1_EDX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = feature_name,

-        .cpuid_eax = 1, .cpuid_reg = R_EDX,

+        .cpuid = {.eax = 1, .reg = R_EDX, },

         .tcg_features = TCG_FEATURES,

     },

     [FEAT_1_ECX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = ext_feature_name,

-        .cpuid_eax = 1, .cpuid_reg = R_ECX,

+        .cpuid = { .eax = 1, .reg = R_ECX, },

         .tcg_features = TCG_EXT_FEATURES,

     },

     [FEAT_8000_0001_EDX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = ext2_feature_name,

-        .cpuid_eax = 0x80000001, .cpuid_reg = R_EDX,

+        .cpuid = { .eax = 0x80000001, .reg = R_EDX, },

         .tcg_features = TCG_EXT2_FEATURES,

     },

     [FEAT_8000_0001_ECX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = ext3_feature_name,

-        .cpuid_eax = 0x80000001, .cpuid_reg = R_ECX,

+        .cpuid = { .eax = 0x80000001, .reg = R_ECX, },

         .tcg_features = TCG_EXT3_FEATURES,

     },

     [FEAT_C000_0001_EDX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = ext4_feature_name,

-        .cpuid_eax = 0xC0000001, .cpuid_reg = R_EDX,

+        .cpuid = { .eax = 0x80000001, .reg = R_EDX, },

         .tcg_features = TCG_EXT4_FEATURES,

     },

     [FEAT_KVM] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = kvm_feature_name,

-        .cpuid_eax = KVM_CPUID_FEATURES, .cpuid_reg = R_EAX,

+        .cpuid = { .eax = KVM_CPUID_FEATURES, .reg = R_EAX, },

         .tcg_features = TCG_KVM_FEATURES,

     },

     [FEAT_SVM] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = svm_feature_name,

-        .cpuid_eax = 0x8000000A, .cpuid_reg = R_EDX,

+        .cpuid = { .eax = 0x8000000A, .reg = R_EDX, },

         .tcg_features = TCG_SVM_FEATURES,

     },

     [FEAT_7_0_EBX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = cpuid_7_0_ebx_feature_name,

-        .cpuid_eax = 7,

-        .cpuid_needs_ecx = true, .cpuid_ecx = 0,

-        .cpuid_reg = R_EBX,

+        .cpuid = {

+            .eax = 7,

+            .needs_ecx = true, .ecx = 0,

+            .reg = R_EBX,

+        },

         .tcg_features = TCG_7_0_EBX_FEATURES,

     },

     [FEAT_7_0_ECX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = cpuid_7_0_ecx_feature_name,

-        .cpuid_eax = 7,

-        .cpuid_needs_ecx = true, .cpuid_ecx = 0,

-        .cpuid_reg = R_ECX,

+        .cpuid = {

+            .eax = 7,

+            .needs_ecx = true, .ecx = 0,

+            .reg = R_ECX,

+        },

         .tcg_features = TCG_7_0_ECX_FEATURES,

     },

     [FEAT_7_0_EDX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = cpuid_7_0_edx_feature_name,

-        .cpuid_eax = 7,

-        .cpuid_needs_ecx = true, .cpuid_ecx = 0,

-        .cpuid_reg = R_EDX,

+        .cpuid = {

+            .eax = 7,

+            .needs_ecx = true, .ecx = 0,

+            .reg = R_EDX,

+        },

         .tcg_features = TCG_7_0_EDX_FEATURES,

     },

     [FEAT_8000_0007_EDX] = {

         .feat_names = cpuid_apm_edx_feature_name,

-        .cpuid_eax = 0x80000007,

-        .cpuid_reg = R_EDX,

+        .cpuid = { .eax = 0x80000007, .reg = R_EDX, },

         .tcg_features = TCG_APM_FEATURES,

     },

     [FEAT_8000_0008_EBX] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = cpuid_80000008_ebx_feature_name,

-        .cpuid_eax = 0x80000008,

-        .cpuid_needs_ecx = false, .cpuid_ecx = 0,

-        .cpuid_reg = R_EBX,

+        .cpuid = { .eax = 0x80000008, .reg = R_EBX, },

     },

     [FEAT_XSAVE] = {

+        .type = CPUID_FEATURE_WORD,

         .feat_names = cpuid_xsave_feature_name,

-        .cpuid_eax = 0xd,

-        .cpuid_needs_ecx = true, .cpuid_ecx = 1,

-        .cpuid_reg = R_EAX,

+        .cpuid = {

+            .eax = 0xd,

+            .needs_ecx = true, .ecx = 1,

+            .reg = R_EAX,

+        },

     },

 };

@@ -384,6 +420,8 @@ typedef struct ExtSaveArea {

     uint32_t offset, size;

 } ExtSaveArea;

+static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w);

+

 static const ExtSaveArea ext_save_areas[] = {

     [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,

             .offset = 0x240, .size = 0x100 },

@@ -1755,10 +1793,7 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)

     FeatureWord w;

     for (w = 0; w < FEATURE_WORDS; w++) {

-        FeatureWordInfo *wi = &feature_word_info[w];

-        x86_cpu_def->features[w] =

-            kvm_arch_get_supported_cpuid(s, wi->cpuid_eax, wi->cpuid_ecx,

-                                         wi->cpuid_reg);

+        x86_cpu_def->features[w] = x86_cpu_get_supported_feature_word(w);

     }

     /*

@@ -1774,19 +1809,40 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)

 #endif /* CONFIG_KVM */

 }

+static char *feature_word_description(FeatureWordInfo *f, uint32_t bit)

+{

+    assert(f->type == CPUID_FEATURE_WORD || f->type == MSR_FEATURE_WORD);

+

+    switch (f->type) {

+    case CPUID_FEATURE_WORD:

+        {

+            const char *reg = get_register_name_32(f->cpuid.reg);

+            assert(reg);

+            return g_strdup_printf("CPUID.%02XH:%s",

+                                   f->cpuid.eax, reg);

+        }

+    case MSR_FEATURE_WORD:

+        return g_strdup_printf("MSR(%02XH)",

+                               f->msr.index);

+    }

+

+    return NULL;

+}

+

 static void report_unavailable_features(FeatureWordInfo *f, uint32_t mask)

 {

     int i;

+    char *feat_word_str;

     for (i = 0; i < 32; ++i) {

         if (1 << i & mask) {

-            const char *reg = get_register_name_32(f->cpuid_reg);

-            assert(reg);

+            feat_word_str = feature_word_description(f, i);

             fprintf(stderr, "warning: host doesn't support requested feature: "

-                "CPUID.%02XH:%s%s%s [bit %d]\n",

-                f->cpuid_eax, reg,

+                "%s%s%s [bit %d]\n",

+                feat_word_str,

                 f->feat_names[i] ? "." : "",

                 f->feat_names[i] ? f->feat_names[i] : "", i);

+            g_free(feat_word_str);

         }

     }

 }

@@ -2095,11 +2151,18 @@ static void x86_cpu_get_feature_words(Object *obj, Visitor *v, void *opaque,

     for (w = 0; w < FEATURE_WORDS; w++) {

         FeatureWordInfo *wi = &feature_word_info[w];

+        /*

+                * We didn't have MSR features when "feature-words" was

+                *  introduced. Therefore skipped other type entries.

+                */

+        if (wi->type != CPUID_FEATURE_WORD) {

+            continue;

+        }

         X86CPUFeatureWordInfo *qwi = &word_infos[w];

-        qwi->cpuid_input_eax = wi->cpuid_eax;

-        qwi->has_cpuid_input_ecx = wi->cpuid_needs_ecx;

-        qwi->cpuid_input_ecx = wi->cpuid_ecx;

-        qwi->cpuid_register = x86_reg_info_32[wi->cpuid_reg].qapi_enum;

+        qwi->cpuid_input_eax = wi->cpuid.eax;

+        qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;

+        qwi->cpuid_input_ecx = wi->cpuid.ecx;

+        qwi->cpuid_register = x86_reg_info_32[wi->cpuid.reg].qapi_enum;

         qwi->features = array[w];

         /* List will be in reverse order, but order shouldn't matter */

@@ -2390,11 +2453,23 @@ CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp)

 static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w)

 {

     FeatureWordInfo *wi = &feature_word_info[w];

+    uint32_t r = 0;

-    assert(kvm_enabled());

-    return kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid_eax,

-                                                   wi->cpuid_ecx,

-                                                   wi->cpuid_reg);

+    if (kvm_enabled()) {

+        switch (wi->type) {

+        case CPUID_FEATURE_WORD:

+            r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid.eax,

+                                                        wi->cpuid.ecx,

+                                                        wi->cpuid.reg);

+            break;

+        case MSR_FEATURE_WORD:

+            r = kvm_arch_get_supported_msr_feature(kvm_state, wi->msr.index);

+            break;

+        }

+    } else {

+        return ~0;

+    }

+    return r;

 }

 /*

-- 

1.8.3.1