|
|
77c23f |
From 1ffeb321151b3878bcbb2229639456c0677305f5 Mon Sep 17 00:00:00 2001
|
|
|
77c23f |
From: "plai@redhat.com" <plai@redhat.com>
|
|
|
77c23f |
Date: Fri, 15 May 2020 18:02:43 +0100
|
|
|
77c23f |
Subject: [PATCH 17/17] target/i386: Add missed features to Cooperlake CPU
|
|
|
77c23f |
model
|
|
|
77c23f |
|
|
|
77c23f |
RH-Author: plai@redhat.com
|
|
|
77c23f |
Message-id: <20200515180243.17488-5-plai@redhat.com>
|
|
|
77c23f |
Patchwork-id: 96611
|
|
|
77c23f |
O-Subject: [RHEL8.2.1 AV qemu-kvm PATCH 4/4] target/i386: Add missed features to Cooperlake CPU model
|
|
|
77c23f |
Bugzilla: 1769912
|
|
|
77c23f |
RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
|
|
|
77c23f |
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
|
|
|
77c23f |
RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
|
77c23f |
|
|
|
77c23f |
From: Xiaoyao Li <xiaoyao.li@intel.com>
|
|
|
77c23f |
|
|
|
77c23f |
It lacks VMX features and two security feature bits (disclosed recently) in
|
|
|
77c23f |
MSR_IA32_ARCH_CAPABILITIES in current Cooperlake CPU model, so add them.
|
|
|
77c23f |
|
|
|
77c23f |
Fixes: 22a866b6166d ("i386: Add new CPU model Cooperlake")
|
|
|
77c23f |
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
|
|
|
77c23f |
Message-Id: <20191225063018.20038-3-xiaoyao.li@intel.com>
|
|
|
77c23f |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
77c23f |
(cherry picked from commit 2dea9d9ca4ea7e9afe83d0b4153b21a16987e866)
|
|
|
77c23f |
Signed-off-by: Paul Lai <plai@redhat.com>
|
|
|
77c23f |
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
|
|
|
77c23f |
---
|
|
|
77c23f |
target/i386/cpu.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++-
|
|
|
77c23f |
1 file changed, 50 insertions(+), 1 deletion(-)
|
|
|
77c23f |
|
|
|
77c23f |
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
|
|
|
77c23f |
index 996a74f..b763adc 100644
|
|
|
77c23f |
--- a/target/i386/cpu.c
|
|
|
77c23f |
+++ b/target/i386/cpu.c
|
|
|
77c23f |
@@ -3202,7 +3202,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|
|
77c23f |
CPUID_7_0_EDX_SPEC_CTRL_SSBD | CPUID_7_0_EDX_ARCH_CAPABILITIES,
|
|
|
77c23f |
.features[FEAT_ARCH_CAPABILITIES] =
|
|
|
77c23f |
MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL |
|
|
|
77c23f |
- MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO,
|
|
|
77c23f |
+ MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO |
|
|
|
77c23f |
+ MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO,
|
|
|
77c23f |
.features[FEAT_7_1_EAX] =
|
|
|
77c23f |
CPUID_7_1_EAX_AVX512_BF16,
|
|
|
77c23f |
/*
|
|
|
77c23f |
@@ -3217,6 +3218,54 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
|
|
77c23f |
CPUID_XSAVE_XGETBV1,
|
|
|
77c23f |
.features[FEAT_6_EAX] =
|
|
|
77c23f |
CPUID_6_EAX_ARAT,
|
|
|
77c23f |
+ /* Missing: Mode-based execute control (XS/XU), processor tracing, TSC scaling */
|
|
|
77c23f |
+ .features[FEAT_VMX_BASIC] = MSR_VMX_BASIC_INS_OUTS |
|
|
|
77c23f |
+ MSR_VMX_BASIC_TRUE_CTLS,
|
|
|
77c23f |
+ .features[FEAT_VMX_ENTRY_CTLS] = VMX_VM_ENTRY_IA32E_MODE |
|
|
|
77c23f |
+ VMX_VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | VMX_VM_ENTRY_LOAD_IA32_PAT |
|
|
|
77c23f |
+ VMX_VM_ENTRY_LOAD_DEBUG_CONTROLS | VMX_VM_ENTRY_LOAD_IA32_EFER,
|
|
|
77c23f |
+ .features[FEAT_VMX_EPT_VPID_CAPS] = MSR_VMX_EPT_EXECONLY |
|
|
|
77c23f |
+ MSR_VMX_EPT_PAGE_WALK_LENGTH_4 | MSR_VMX_EPT_WB | MSR_VMX_EPT_2MB |
|
|
|
77c23f |
+ MSR_VMX_EPT_1GB | MSR_VMX_EPT_INVEPT |
|
|
|
77c23f |
+ MSR_VMX_EPT_INVEPT_SINGLE_CONTEXT | MSR_VMX_EPT_INVEPT_ALL_CONTEXT |
|
|
|
77c23f |
+ MSR_VMX_EPT_INVVPID | MSR_VMX_EPT_INVVPID_SINGLE_ADDR |
|
|
|
77c23f |
+ MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT | MSR_VMX_EPT_INVVPID_ALL_CONTEXT |
|
|
|
77c23f |
+ MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT_NOGLOBALS | MSR_VMX_EPT_AD_BITS,
|
|
|
77c23f |
+ .features[FEAT_VMX_EXIT_CTLS] =
|
|
|
77c23f |
+ VMX_VM_EXIT_ACK_INTR_ON_EXIT | VMX_VM_EXIT_SAVE_DEBUG_CONTROLS |
|
|
|
77c23f |
+ VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL |
|
|
|
77c23f |
+ VMX_VM_EXIT_LOAD_IA32_PAT | VMX_VM_EXIT_LOAD_IA32_EFER |
|
|
|
77c23f |
+ VMX_VM_EXIT_SAVE_IA32_PAT | VMX_VM_EXIT_SAVE_IA32_EFER |
|
|
|
77c23f |
+ VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER,
|
|
|
77c23f |
+ .features[FEAT_VMX_MISC] = MSR_VMX_MISC_ACTIVITY_HLT |
|
|
|
77c23f |
+ MSR_VMX_MISC_STORE_LMA | MSR_VMX_MISC_VMWRITE_VMEXIT,
|
|
|
77c23f |
+ .features[FEAT_VMX_PINBASED_CTLS] = VMX_PIN_BASED_EXT_INTR_MASK |
|
|
|
77c23f |
+ VMX_PIN_BASED_NMI_EXITING | VMX_PIN_BASED_VIRTUAL_NMIS |
|
|
|
77c23f |
+ VMX_PIN_BASED_VMX_PREEMPTION_TIMER | VMX_PIN_BASED_POSTED_INTR,
|
|
|
77c23f |
+ .features[FEAT_VMX_PROCBASED_CTLS] = VMX_CPU_BASED_VIRTUAL_INTR_PENDING |
|
|
|
77c23f |
+ VMX_CPU_BASED_USE_TSC_OFFSETING | VMX_CPU_BASED_HLT_EXITING |
|
|
|
77c23f |
+ VMX_CPU_BASED_INVLPG_EXITING | VMX_CPU_BASED_MWAIT_EXITING |
|
|
|
77c23f |
+ VMX_CPU_BASED_RDPMC_EXITING | VMX_CPU_BASED_RDTSC_EXITING |
|
|
|
77c23f |
+ VMX_CPU_BASED_CR8_LOAD_EXITING | VMX_CPU_BASED_CR8_STORE_EXITING |
|
|
|
77c23f |
+ VMX_CPU_BASED_TPR_SHADOW | VMX_CPU_BASED_MOV_DR_EXITING |
|
|
|
77c23f |
+ VMX_CPU_BASED_UNCOND_IO_EXITING | VMX_CPU_BASED_USE_IO_BITMAPS |
|
|
|
77c23f |
+ VMX_CPU_BASED_MONITOR_EXITING | VMX_CPU_BASED_PAUSE_EXITING |
|
|
|
77c23f |
+ VMX_CPU_BASED_VIRTUAL_NMI_PENDING | VMX_CPU_BASED_USE_MSR_BITMAPS |
|
|
|
77c23f |
+ VMX_CPU_BASED_CR3_LOAD_EXITING | VMX_CPU_BASED_CR3_STORE_EXITING |
|
|
|
77c23f |
+ VMX_CPU_BASED_MONITOR_TRAP_FLAG |
|
|
|
77c23f |
+ VMX_CPU_BASED_ACTIVATE_SECONDARY_CONTROLS,
|
|
|
77c23f |
+ .features[FEAT_VMX_SECONDARY_CTLS] =
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_WBINVD_EXITING | VMX_SECONDARY_EXEC_ENABLE_EPT |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_DESC | VMX_SECONDARY_EXEC_RDTSCP |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_ENABLE_VPID | VMX_SECONDARY_EXEC_UNRESTRICTED_GUEST |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS |
|
|
|
77c23f |
+ VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
|
|
|
77c23f |
+ .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING,
|
|
|
77c23f |
.xlevel = 0x80000008,
|
|
|
77c23f |
.model_id = "Intel Xeon Processor (Cooperlake)",
|
|
|
77c23f |
},
|
|
|
77c23f |
--
|
|
|
77c23f |
1.8.3.1
|
|
|
77c23f |
|