|
 |
77c23f |
From bdad28b11e36f657cb8909e7223a7d8fc0948c2e Mon Sep 17 00:00:00 2001
|
|
|
77c23f |
From: Thomas Huth <thuth@redhat.com>
|
|
|
77c23f |
Date: Fri, 29 May 2020 05:53:51 -0400
|
|
|
77c23f |
Subject: [PATCH 09/42] s390x: Fix cpu normal reset ri clearing
|
|
|
77c23f |
MIME-Version: 1.0
|
|
|
77c23f |
Content-Type: text/plain; charset=UTF-8
|
|
|
77c23f |
Content-Transfer-Encoding: 8bit
|
|
|
77c23f |
|
|
|
77c23f |
RH-Author: Thomas Huth <thuth@redhat.com>
|
|
|
77c23f |
Message-id: <20200529055420.16855-10-thuth@redhat.com>
|
|
|
77c23f |
Patchwork-id: 97029
|
|
|
77c23f |
O-Subject: [RHEL-8.3.0 qemu-kvm PATCH v2 09/38] s390x: Fix cpu normal reset ri clearing
|
|
|
77c23f |
Bugzilla: 1828317
|
|
|
77c23f |
RH-Acked-by: Claudio Imbrenda <cimbrend@redhat.com>
|
|
|
77c23f |
RH-Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
|
|
|
77c23f |
RH-Acked-by: Cornelia Huck <cohuck@redhat.com>
|
|
|
77c23f |
RH-Acked-by: David Hildenbrand <david@redhat.com>
|
|
|
77c23f |
|
|
|
77c23f |
From: Janosch Frank <frankja@linux.ibm.com>
|
|
|
77c23f |
|
|
|
77c23f |
As it turns out we need to clear the ri controls and PSW enablement
|
|
|
77c23f |
bit to be architecture compliant.
|
|
|
77c23f |
|
|
|
77c23f |
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
|
|
|
77c23f |
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
|
|
|
77c23f |
Message-Id: <20191203132813.2734-4-frankja@linux.ibm.com>
|
|
|
77c23f |
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
|
|
|
77c23f |
(cherry picked from commit e893baee70149896d1e43e341da4d6c614037d5d)
|
|
|
77c23f |
Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
|
|
|
77c23f |
---
|
|
|
77c23f |
target/s390x/cpu.c | 7 ++++++-
|
|
|
77c23f |
target/s390x/cpu.h | 7 ++++++-
|
|
|
77c23f |
2 files changed, 12 insertions(+), 2 deletions(-)
|
|
|
77c23f |
|
|
|
77c23f |
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
|
|
|
77c23f |
index bd39cb54b7..99ea09085a 100644
|
|
|
77c23f |
--- a/target/s390x/cpu.c
|
|
|
77c23f |
+++ b/target/s390x/cpu.c
|
|
|
77c23f |
@@ -100,7 +100,7 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
|
|
|
77c23f |
case S390_CPU_RESET_INITIAL:
|
|
|
77c23f |
/* initial reset does not clear everything! */
|
|
|
77c23f |
memset(&env->start_initial_reset_fields, 0,
|
|
|
77c23f |
- offsetof(CPUS390XState, end_reset_fields) -
|
|
|
77c23f |
+ offsetof(CPUS390XState, start_normal_reset_fields) -
|
|
|
77c23f |
offsetof(CPUS390XState, start_initial_reset_fields));
|
|
|
77c23f |
|
|
|
77c23f |
/* architectured initial value for Breaking-Event-Address register */
|
|
|
77c23f |
@@ -123,6 +123,11 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
|
|
|
77c23f |
&env->fpu_status);
|
|
|
77c23f |
/* fall through */
|
|
|
77c23f |
case S390_CPU_RESET_NORMAL:
|
|
|
77c23f |
+ env->psw.mask &= ~PSW_MASK_RI;
|
|
|
77c23f |
+ memset(&env->start_normal_reset_fields, 0,
|
|
|
77c23f |
+ offsetof(CPUS390XState, end_reset_fields) -
|
|
|
77c23f |
+ offsetof(CPUS390XState, start_normal_reset_fields));
|
|
|
77c23f |
+
|
|
|
77c23f |
env->pfault_token = -1UL;
|
|
|
77c23f |
env->bpbc = false;
|
|
|
77c23f |
break;
|
|
|
77c23f |
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
|
|
|
77c23f |
index d2af13b345..7e1c18d596 100644
|
|
|
77c23f |
--- a/target/s390x/cpu.h
|
|
|
77c23f |
+++ b/target/s390x/cpu.h
|
|
|
77c23f |
@@ -58,7 +58,6 @@ struct CPUS390XState {
|
|
|
77c23f |
*/
|
|
|
77c23f |
uint64_t vregs[32][2] QEMU_ALIGNED(16); /* vector registers */
|
|
|
77c23f |
uint32_t aregs[16]; /* access registers */
|
|
|
77c23f |
- uint8_t riccb[64]; /* runtime instrumentation control */
|
|
|
77c23f |
uint64_t gscb[4]; /* guarded storage control */
|
|
|
77c23f |
uint64_t etoken; /* etoken */
|
|
|
77c23f |
uint64_t etoken_extension; /* etoken extension */
|
|
|
77c23f |
@@ -114,6 +113,10 @@ struct CPUS390XState {
|
|
|
77c23f |
uint64_t gbea;
|
|
|
77c23f |
uint64_t pp;
|
|
|
77c23f |
|
|
|
77c23f |
+ /* Fields up to this point are not cleared by normal CPU reset */
|
|
|
77c23f |
+ struct {} start_normal_reset_fields;
|
|
|
77c23f |
+ uint8_t riccb[64]; /* runtime instrumentation control */
|
|
|
77c23f |
+
|
|
|
77c23f |
/* Fields up to this point are cleared by a CPU reset */
|
|
|
77c23f |
struct {} end_reset_fields;
|
|
|
77c23f |
|
|
|
77c23f |
@@ -252,6 +255,7 @@ extern const VMStateDescription vmstate_s390_cpu;
|
|
|
77c23f |
#undef PSW_SHIFT_ASC
|
|
|
77c23f |
#undef PSW_MASK_CC
|
|
|
77c23f |
#undef PSW_MASK_PM
|
|
|
77c23f |
+#undef PSW_MASK_RI
|
|
|
77c23f |
#undef PSW_SHIFT_MASK_PM
|
|
|
77c23f |
#undef PSW_MASK_64
|
|
|
77c23f |
#undef PSW_MASK_32
|
|
|
77c23f |
@@ -273,6 +277,7 @@ extern const VMStateDescription vmstate_s390_cpu;
|
|
|
77c23f |
#define PSW_MASK_CC 0x0000300000000000ULL
|
|
|
77c23f |
#define PSW_MASK_PM 0x00000F0000000000ULL
|
|
|
77c23f |
#define PSW_SHIFT_MASK_PM 40
|
|
|
77c23f |
+#define PSW_MASK_RI 0x0000008000000000ULL
|
|
|
77c23f |
#define PSW_MASK_64 0x0000000100000000ULL
|
|
|
77c23f |
#define PSW_MASK_32 0x0000000080000000ULL
|
|
|
77c23f |
#define PSW_MASK_ESA_ADDR 0x000000007fffffffULL
|
|
|
77c23f |
--
|
|
|
77c23f |
2.27.0
|
|
|
77c23f |
|