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From f5a29669048a0a889348839c8707f7f10b0bec48 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= <berrange@redhat.com>
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Date: Wed, 9 May 2018 09:06:29 +0100
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Subject: [PATCH] i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Daniel P. Berrangé <berrange@redhat.com>
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Bugzilla: 1574075
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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New microcode introduces the "Speculative Store Bypass Disable"
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CPUID feature bit. This needs to be exposed to guest OS to allow
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them to protect against CVE-2018-3639.
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Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
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---
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target-i386/cpu.c | 2 +-
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target-i386/cpu.h | 1 +
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2 files changed, 2 insertions(+), 1 deletion(-)
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diff --git a/target-i386/cpu.c b/target-i386/cpu.c
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index 08b43f5..539c202 100644
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--- a/target-i386/cpu.c
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+++ b/target-i386/cpu.c
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@@ -173,7 +173,7 @@ static const char *cpuid_7_0_edx_feature_name[] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, "spec-ctrl", "stibp",
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- NULL, "arch-facilities", NULL, NULL,
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+ NULL, "arch-facilities", NULL, "ssbd",
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};
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static const char *cpuid_80000008_ebx_feature_name[] = {
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diff --git a/target-i386/cpu.h b/target-i386/cpu.h
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index a8a640a..da84443 100644
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--- a/target-i386/cpu.h
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+++ b/target-i386/cpu.h
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@@ -590,6 +590,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Indirect Branch - Restrict Speculation */
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+#define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */
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#define CPUID_8000_0008_EBX_IBPB (1U << 12) /* Indirect Branch Prediction Barrier */
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--
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1.8.3.1
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