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From 1fb1babff46264380702607ac92fc95d8adb90c1 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Thu, 26 Jul 2018 17:19:02 +0100
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Subject: [PATCH 12/14] i386: Enable TOPOEXT feature on AMD EPYC CPU
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RH-Author: Eduardo Habkost <ehabkost@redhat.com>
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Message-id: <20180726171904.27418-10-ehabkost@redhat.com>
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Patchwork-id: 81531
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O-Subject: [qemu-kvm RHEL8/virt212 PATCH v2 09/11] i386: Enable TOPOEXT feature on AMD EPYC CPU
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Bugzilla: 1597739
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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From: Babu Moger <babu.moger@amd.com>
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Enable TOPOEXT feature on EPYC CPU. This is required to support
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hyperthreading on VM guests. Also extend xlevel to 0x8000001E.
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Disable topoext on PC_COMPAT_2_12 and keep xlevel 0x8000000a.
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Signed-off-by: Babu Moger <babu.moger@amd.com>
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Message-Id: <1529443919-67509-3-git-send-email-babu.moger@amd.com>
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[ehabkost: Added EPYC-IBPB.xlevel to PC_COMPAT_2_12]
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit e00516475c270dcb6705753da96063f95699abf2)
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[ehabkost: moved compat code to PC_RHEL75_COMPAT]
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[ehabkost: fixed typo on EPYC-IBPB compat entry]
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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---
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Changes v2 -> v3:
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* Removed duplicate TYPE_X86_CPU.legacy-cache=on entry from
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PC_RHEL7_5_COMPAT (caught by Laurent Vivier)
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Changes v1 -> v2:
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* Fixed typo on EPYC-IBPB compat entry
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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include/hw/i386/pc.h | 12 ++++++++++++
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target/i386/cpu.c | 10 ++++++----
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2 files changed, 18 insertions(+), 4 deletions(-)
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diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
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index 5aebf6e..c33ddbb 100644
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--- a/include/hw/i386/pc.h
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+++ b/include/hw/i386/pc.h
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@@ -983,6 +983,18 @@ extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
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.driver = TYPE_X86_CPU,\
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.property = "legacy-cache",\
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.value = "on",\
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+ },{ /* PC_RHEL7_5_COMPAT from PC_COMPAT_2_12 */ \
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+ .driver = TYPE_X86_CPU,\
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+ .property = "topoext",\
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+ .value = "off",\
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+ },{ /* PC_RHEL7_5_COMPAT from PC_COMPAT_2_12 */ \
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+ .driver = "EPYC-" TYPE_X86_CPU,\
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+ .property = "xlevel",\
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+ .value = stringify(0x8000000a),\
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+ },{ /* PC_RHEL7_5_COMPAT from PC_COMPAT_2_12 */ \
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+ .driver = "EPYC-IBPB-" TYPE_X86_CPU,\
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+ .property = "xlevel",\
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+ .value = stringify(0x8000000a),\
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},
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index cd0667f..fe2b2e8 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -2562,7 +2562,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.features[FEAT_8000_0001_ECX] =
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CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
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CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
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- CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
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+ CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM |
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+ CPUID_EXT3_TOPOEXT,
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.features[FEAT_7_0_EBX] =
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CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 |
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CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED |
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@@ -2577,7 +2578,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_XSAVE_XGETBV1,
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.features[FEAT_6_EAX] =
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CPUID_6_EAX_ARAT,
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- .xlevel = 0x8000000A,
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+ .xlevel = 0x8000001E,
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.model_id = "AMD EPYC Processor",
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.cache_info = &epyc_cache_info,
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},
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@@ -2607,7 +2608,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.features[FEAT_8000_0001_ECX] =
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CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
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CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
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- CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
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+ CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM |
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+ CPUID_EXT3_TOPOEXT,
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.features[FEAT_8000_0008_EBX] =
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CPUID_8000_0008_EBX_IBPB,
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.features[FEAT_7_0_EBX] =
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@@ -2624,7 +2626,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_XSAVE_XGETBV1,
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.features[FEAT_6_EAX] =
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CPUID_6_EAX_ARAT,
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- .xlevel = 0x8000000A,
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+ .xlevel = 0x8000001E,
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.model_id = "AMD EPYC Processor (with IBPB)",
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.cache_info = &epyc_cache_info,
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},
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--
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1.8.3.1
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