From 9785cad163ad4557e218ea40ed146bf02b02cb98 Mon Sep 17 00:00:00 2001

From: "plai@redhat.com" <plai@redhat.com>

Date: Wed, 3 Apr 2019 15:54:27 +0100

Subject: [PATCH 03/10] i386: Add CPUID bit for PCONFIG

RH-Author: plai@redhat.com

Message-id: <1554306874-28796-4-git-send-email-plai@redhat.com>

Patchwork-id: 85381

O-Subject: [RHEL8.1 qemu-kvm PATCH resend 03/10] i386: Add CPUID bit for PCONFIG

Bugzilla: 1561761

RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>

RH-Acked-by: Igor Mammedov <imammedo@redhat.com>

RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>

From: Robert Hoo <robert.hu@linux.intel.com>

PCONFIG: Platform configuration, enumerated by CPUID.(EAX=07H, ECX=0):

EDX[bit18].

Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>

Message-Id: <1530781798-183214-4-git-send-email-robert.hu@linux.intel.com>

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

(cherry picked from commit 5131dc433df54b37e8e918d8fba7fe10344e7a7b)

Signed-off-by: Paul Lai <plai@redhat.com>

Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>

---

 target/i386/cpu.c | 2 +-

 target/i386/cpu.h | 1 +

 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c

index 6d38ac0..fec39bd 100644

--- a/target/i386/cpu.c

+++ b/target/i386/cpu.c

@@ -1005,7 +1005,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {

             NULL, NULL, NULL, NULL,

             NULL, NULL, NULL, NULL,

             NULL, NULL, NULL, NULL,

-            NULL, NULL, NULL, NULL,

+            NULL, NULL, "pconfig", NULL,

             NULL, NULL, NULL, NULL,

             NULL, NULL, "spec-ctrl", "stibp",

             NULL, "arch-capabilities", NULL, "ssbd",

diff --git a/target/i386/cpu.h b/target/i386/cpu.h

index e5e5169..3b2ea97 100644

--- a/target/i386/cpu.h

+++ b/target/i386/cpu.h

@@ -686,6 +686,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];

 #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */

 #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */

+#define CPUID_7_0_EDX_PCONFIG (1U << 18)       /* Platform Configuration */

 #define CPUID_7_0_EDX_SPEC_CTRL     (1U << 26) /* Speculation Control */

 #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29)  /*Arch Capabilities*/

 #define CPUID_7_0_EDX_SPEC_CTRL_SSBD  (1U << 31) /* Speculative Store Bypass Disable */

-- 

1.8.3.1