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From 2df5c1f5b014126595a26c6797089d284a3b211c Mon Sep 17 00:00:00 2001
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From: Harsh Prateek Bora <harshpb@linux.ibm.com>
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Date: Wed, 24 Jan 2024 10:30:55 +1000
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Subject: [PATCH] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for
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CPU IPIs.
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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spapr_irq_init currently uses existing macro SPAPR_XIRQ_BASE to refer to
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the range of CPU IPIs during initialization of nr-irqs property.
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It is more appropriate to have its own define which can be further
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reused as appropriate for correct interpretation.
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Suggested-by: Cedric Le Goater <clg@kaod.org>
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Reviewed-by: Cédric Le Goater <clg@kaod.org>
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Tested-by: Kowshik Jois <kowsjois@linux.ibm.com>
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Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
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Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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---
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hw/ppc/spapr_irq.c | 6 ++++--
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include/hw/ppc/spapr_irq.h | 14 +++++++++++++-
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2 files changed, 17 insertions(+), 3 deletions(-)
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diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
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index a0d1e1298e1e..97b2fc42ab03 100644
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--- a/hw/ppc/spapr_irq.c
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+++ b/hw/ppc/spapr_irq.c
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@@ -23,6 +23,8 @@
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#include "trace.h"
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+QEMU_BUILD_BUG_ON(SPAPR_IRQ_NR_IPIS > SPAPR_XIRQ_BASE);
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+
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static const TypeInfo spapr_intc_info = {
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.name = TYPE_SPAPR_INTC,
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.parent = TYPE_INTERFACE,
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@@ -329,7 +331,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
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int i;
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dev = qdev_new(TYPE_SPAPR_XIVE);
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- qdev_prop_set_uint32(dev, "nr-irqs", smc->nr_xirqs + SPAPR_XIRQ_BASE);
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+ qdev_prop_set_uint32(dev, "nr-irqs", smc->nr_xirqs + SPAPR_IRQ_NR_IPIS);
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/*
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* 8 XIVE END structures per CPU. One for each available
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* priority
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@@ -356,7 +358,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
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}
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spapr->qirqs = qemu_allocate_irqs(spapr_set_irq, spapr,
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- smc->nr_xirqs + SPAPR_XIRQ_BASE);
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+ smc->nr_xirqs + SPAPR_IRQ_NR_IPIS);
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/*
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* Mostly we don't actually need this until reset, except that not
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diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
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index c22a72c9e270..4fd2d5853d8b 100644
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--- a/include/hw/ppc/spapr_irq.h
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+++ b/include/hw/ppc/spapr_irq.h
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@@ -14,9 +14,21 @@
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#include "qom/object.h"
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/*
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- * IRQ range offsets per device type
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+ * The XIVE IRQ backend uses the same layout as the XICS backend but
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+ * covers the full range of the IRQ number space. The IRQ numbers for
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+ * the CPU IPIs are allocated at the bottom of this space, below 4K,
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+ * to preserve compatibility with XICS which does not use that range.
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+ */
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+
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+/*
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+ * CPU IPI range (XIVE only)
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*/
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#define SPAPR_IRQ_IPI 0x0
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+#define SPAPR_IRQ_NR_IPIS 0x1000
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+
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+/*
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+ * IRQ range offsets per device type
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+ */
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#define SPAPR_XIRQ_BASE XICS_IRQ_BASE /* 0x1000 */
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#define SPAPR_IRQ_EPOW (SPAPR_XIRQ_BASE + 0x0000)
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