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From 16f89cbf7737626a0ab24a5b0fd7ce4ab940f5a2 Mon Sep 17 00:00:00 2001
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From: Cole Robinson <crobinso@redhat.com>
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Date: Mon, 7 Oct 2013 16:32:24 -0400
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Subject: [PATCH] Fix pc migration from qemu <= 1.5
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The following commit introduced a migration incompatibility:
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commit 568f0690fd9aa4d39d84b04c1a5dbb53a915c3fe
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Author: David Gibson <david@gibson.dropbear.id.au>
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Date: Thu Jun 6 18:48:49 2013 +1000
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pci: Replace pci_find_domain() with more general pci_root_bus_path()
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The issue is that i440fx savevm idstr went from 0000:00:00.0/I440FX to
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0000:00.0/I440FX. Unfortunately we are stuck with the breakage for
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1.6 machine types.
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Add a compat property to maintain the busted idstr for the 1.6 machine
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types, but revert to the old style format for 1.7+, and <= 1.5.
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Tested with migration from qemu 1.5, qemu 1.6, and qemu.git.
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Cc: qemu-stable@nongnu.org
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---
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hw/i386/pc_piix.c | 11 +++++++++++
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hw/i386/pc_q35.c | 11 +++++++++++
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hw/pci-host/piix.c | 9 ++++++++-
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hw/pci-host/q35.c | 10 ++++++++--
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include/hw/i386/pc.h | 20 ++++++++++++++++++++
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include/hw/pci-host/q35.h | 1 +
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6 files changed, 59 insertions(+), 3 deletions(-)
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diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
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index 2f2cb4d..10866f5 100644
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--- a/hw/i386/pc_piix.c
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+++ b/hw/i386/pc_piix.c
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@@ -341,6 +341,13 @@ static void pc_xen_hvm_init(QEMUMachineInitArgs *args)
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}
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#endif
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+#define PC_I440FX_MACHINE_OPTIONS \
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+ PC_DEFAULT_MACHINE_OPTIONS, \
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+ .desc = "Standard PC (i440FX + PIIX, 1996)", \
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+ .hot_add_cpu = pc_hot_add_cpu
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+
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+#define PC_I440FX_1_6_MACHINE_OPTIONS PC_I440FX_MACHINE_OPTIONS
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+
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static QEMUMachine pc_i440fx_machine_v1_6 = {
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.name = "pc-i440fx-1.6",
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.alias = "pc",
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@@ -349,6 +356,10 @@ static QEMUMachine pc_i440fx_machine_v1_6 = {
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.hot_add_cpu = pc_hot_add_cpu,
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.max_cpus = 255,
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.is_default = 1,
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+ .compat_props = (GlobalProperty[]) {
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+ PC_COMPAT_1_6,
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+ { /* end of list */ }
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+ },
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DEFAULT_MACHINE_OPTIONS,
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};
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diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
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index dd13130..4998ed3 100644
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--- a/hw/i386/pc_q35.c
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+++ b/hw/i386/pc_q35.c
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@@ -243,6 +243,13 @@ static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
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pc_q35_init(args);
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}
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+#define PC_Q35_MACHINE_OPTIONS \
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+ PC_DEFAULT_MACHINE_OPTIONS, \
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+ .desc = "Standard PC (Q35 + ICH9, 2009)", \
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+ .hot_add_cpu = pc_hot_add_cpu
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+
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+#define PC_Q35_1_6_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
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+
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static QEMUMachine pc_q35_machine_v1_6 = {
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.name = "pc-q35-1.6",
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.alias = "q35",
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@@ -250,6 +257,10 @@ static QEMUMachine pc_q35_machine_v1_6 = {
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.init = pc_q35_init_1_6,
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.hot_add_cpu = pc_hot_add_cpu,
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.max_cpus = 255,
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+ .compat_props = (GlobalProperty[]) {
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+ PC_COMPAT_1_6,
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+ { /* end of list */ }
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+ },
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DEFAULT_MACHINE_OPTIONS,
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};
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diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
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index 221d82b..967f949 100644
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--- a/hw/pci-host/piix.c
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+++ b/hw/pci-host/piix.c
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@@ -48,6 +48,7 @@ typedef struct I440FXState {
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PCIHostState parent_obj;
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PcPciInfo pci_info;
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uint64_t pci_hole64_size;
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+ uint32_t short_root_bus;
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} I440FXState;
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#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
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@@ -706,13 +707,19 @@ static const TypeInfo i440fx_info = {
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static const char *i440fx_pcihost_root_bus_path(PCIHostState *host_bridge,
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PCIBus *rootbus)
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{
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+ I440FXState *s = I440FX_PCI_HOST_BRIDGE(host_bridge);
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+
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/* For backwards compat with old device paths */
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- return "0000";
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+ if (s->short_root_bus) {
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+ return "0000";
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+ }
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+ return "0000:00";
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}
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static Property i440fx_props[] = {
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DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, I440FXState,
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pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE),
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+ DEFINE_PROP_UINT32("short_root_bus", I440FXState, short_root_bus, 0),
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DEFINE_PROP_END_OF_LIST(),
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};
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diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
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index 4febd24..f762053 100644
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--- a/hw/pci-host/q35.c
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+++ b/hw/pci-host/q35.c
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@@ -61,8 +61,13 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
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static const char *q35_host_root_bus_path(PCIHostState *host_bridge,
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PCIBus *rootbus)
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{
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- /* For backwards compat with old device paths */
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- return "0000";
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+ Q35PCIHost *s = Q35_HOST_DEVICE(host_bridge);
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+
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+ /* For backwards compat with old device paths */
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+ if (s->mch.short_root_bus) {
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+ return "0000";
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+ }
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+ return "0000:00";
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}
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static void q35_host_get_pci_hole_start(Object *obj, Visitor *v,
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@@ -108,6 +113,7 @@ static Property mch_props[] = {
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MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT),
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DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, Q35PCIHost,
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mch.pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE),
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+ DEFINE_PROP_UINT32("short_root_bus", Q35PCIHost, mch.short_root_bus, 0),
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DEFINE_PROP_END_OF_LIST(),
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};
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diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
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index 475ba9e..a0bbdd9 100644
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--- a/include/hw/i386/pc.h
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+++ b/include/hw/i386/pc.h
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@@ -225,7 +225,19 @@ void pvpanic_init(ISABus *bus);
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int e820_add_entry(uint64_t, uint64_t, uint32_t);
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+#define PC_COMPAT_1_6 \
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+ {\
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+ .driver = "i440FX-pcihost",\
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+ .property = "short_root_bus",\
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+ .value = stringify(1),\
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+ },{\
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+ .driver = "mch",\
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+ .property = "short_root_bus",\
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+ .value = stringify(1),\
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+ }
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+
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#define PC_COMPAT_1_5 \
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+ PC_COMPAT_1_6, \
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{\
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.driver = "Conroe-" TYPE_X86_CPU,\
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.property = "model",\
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@@ -258,6 +270,14 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
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.driver = TYPE_X86_CPU,\
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.property = "pmu",\
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.value = "on",\
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+ },{\
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+ .driver = "i440FX-pcihost",\
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+ .property = "short_root_bus",\
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+ .value = stringify(0),\
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+ },{\
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+ .driver = "mch",\
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+ .property = "short_root_bus",\
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+ .value = stringify(0),\
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}
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#define PC_COMPAT_1_4 \
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diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
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index 6eb7ab6..95a3cc2 100644
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--- a/include/hw/pci-host/q35.h
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+++ b/include/hw/pci-host/q35.h
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@@ -61,6 +61,7 @@ typedef struct MCHPCIState {
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ram_addr_t above_4g_mem_size;
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uint64_t pci_hole64_size;
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PcGuestInfo *guest_info;
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+ uint32_t short_root_bus;
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} MCHPCIState;
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typedef struct Q35PCIHost {
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