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From fe7f7d7ae7114fb220ed258e249f9a63834f6fa6 Mon Sep 17 00:00:00 2001
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From: dann frazier <dann.frazier@canonical.com>
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Date: Wed, 21 Sep 2011 14:06:25 -0600
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Subject: [PATCH] e1000: Don't set the Capabilities List bit
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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[Originally sent to qemu-kvm list, but I was redirected here]
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The Capabilities Pointer is NULL, so this bit shouldn't be set. The state of
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this bit doesn't appear to change any behavior on Linux/Windows versions we've
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tested, but it does cause Windows' PCI/PCI Express Compliance Test to balk.
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I happen to have a physical 82540EM controller, and it also sets the
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Capabilities Bit, but it actually has items on the capabilities list to go
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with it :)
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Signed-off-by: dann frazier <dann.frazier@canonical.com>
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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(cherry picked from commit dd8e93799f13ef82d83c185b8e71e049452f7d40)
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Signed-off-by: Andreas Färber <afaerber@suse.de>
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---
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hw/e1000.c | 2 --
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1 file changed, 2 deletions(-)
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diff --git a/hw/e1000.c b/hw/e1000.c
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index e4d9ab5..7971457 100644
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--- a/hw/e1000.c
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+++ b/hw/e1000.c
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@@ -1167,8 +1167,6 @@ static int pci_e1000_init(PCIDevice *pci_dev)
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pci_conf = d->dev.config;
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- /* TODO: we have no capabilities, so why is this bit set? */
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- pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_CAP_LIST);
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/* TODO: RST# value should be 0, PCI spec 6.2.4 */
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pci_conf[PCI_CACHE_LINE_SIZE] = 0x10;
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--
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1.7.11.2
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