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From 3942910a66f682b98ac53ac2d2fba65b9c75eefd Mon Sep 17 00:00:00 2001
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Fri, 21 Sep 2012 10:02:45 +0200
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Subject: [PATCH] tcg: remove #ifdef #endif around TCGOpcode tests
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Commit 25c4d9cc changed all TCGOpcode enums to be available, so we don't
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need to #ifdef #endif the one that are available only on some targets.
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This makes the code easier to read.
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Reviewed-by: Richard Henderson <rth@twiddle.net>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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tcg/tcg.c | 13 +------------
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1 file changed, 1 insertion(+), 12 deletions(-)
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diff --git a/tcg/tcg.c b/tcg/tcg.c
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index 24ce830..93421cd 100644
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--- a/tcg/tcg.c
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+++ b/tcg/tcg.c
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@@ -937,11 +937,7 @@ void tcg_dump_ops(TCGContext *s)
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args[nb_oargs + i]));
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}
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}
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- } else if (c == INDEX_op_movi_i32
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-#if TCG_TARGET_REG_BITS == 64
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- || c == INDEX_op_movi_i64
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-#endif
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- ) {
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+ } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) {
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tcg_target_ulong val;
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TCGHelperInfo *th;
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@@ -993,14 +989,11 @@ void tcg_dump_ops(TCGContext *s)
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case INDEX_op_brcond_i32:
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case INDEX_op_setcond_i32:
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case INDEX_op_movcond_i32:
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-#if TCG_TARGET_REG_BITS == 32
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case INDEX_op_brcond2_i32:
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case INDEX_op_setcond2_i32:
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-#else
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case INDEX_op_brcond_i64:
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case INDEX_op_setcond_i64:
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case INDEX_op_movcond_i64:
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-#endif
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if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
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qemu_log(",%s", cond_name[args[k++]]);
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} else {
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@@ -2095,16 +2088,12 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
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#endif
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switch(opc) {
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case INDEX_op_mov_i32:
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-#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_mov_i64:
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-#endif
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dead_args = s->op_dead_args[op_index];
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tcg_reg_alloc_mov(s, def, args, dead_args);
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break;
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case INDEX_op_movi_i32:
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-#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_movi_i64:
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-#endif
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tcg_reg_alloc_movi(s, args);
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break;
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case INDEX_op_debug_insn_start:
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--
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1.7.12.1
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