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From 8f7e267c7b98b378e301519b10aa3d18f0ceb45c Mon Sep 17 00:00:00 2001
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Message-Id: <8f7e267c7b98b378e301519b10aa3d18f0ceb45c@dist-git>
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From: Jiri Denemark <jdenemar@redhat.com>
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Date: Thu, 21 Apr 2022 18:25:15 +0200
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Subject: [PATCH] cputest: Add some real world baseline tests
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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Reviewed-by: Michal Privoznik <mprivozn@redhat.com>
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(cherry picked from commit 63d633b9a4fc42da7e2acaf45501914607d968a5)
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https://bugzilla.redhat.com/show_bug.cgi?id=2084030
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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---
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 tests/cputest.c                               | 118 +++++++++++++++---
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 ...id-baseline-Broadwell-IBRS+Cascadelake.xml |  11 ++
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 ..._64-cpuid-baseline-Cascadelake+Icelake.xml |  14 +++
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 ...puid-baseline-Cascadelake+Skylake-IBRS.xml |  12 ++
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 ..._64-cpuid-baseline-Cascadelake+Skylake.xml |   8 ++
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 ...-cpuid-baseline-Cooperlake+Cascadelake.xml |  17 +++
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 ...6_64-cpuid-baseline-Cooperlake+Icelake.xml |  14 +++
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 .../x86_64-cpuid-baseline-EPYC+Rome.xml       |  13 ++
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 .../x86_64-cpuid-baseline-Haswell+Skylake.xml |  14 +++
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 ...-baseline-Haswell-noTSX-IBRS+Broadwell.xml |  14 +++
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 ...seline-Haswell-noTSX-IBRS+Skylake-IBRS.xml |  14 +++
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 ...id-baseline-Haswell-noTSX-IBRS+Skylake.xml |  14 +++
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 .../x86_64-cpuid-baseline-Ryzen+Rome.xml      |  13 ++
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 ...4-cpuid-baseline-Skylake-Client+Server.xml |   9 ++
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 14 files changed, 271 insertions(+), 14 deletions(-)
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml
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 create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml
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diff --git a/tests/cputest.c b/tests/cputest.c
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index b939e20718..b39ec7e18b 100644
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--- a/tests/cputest.c
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+++ b/tests/cputest.c
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@@ -58,6 +58,8 @@ struct data {
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     const char *name;
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     virDomainCapsCPUModels *models;
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     const char *modelsName;
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+    const char **cpus;
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+    int ncpus;
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     unsigned int flags;
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     int result;
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 };
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@@ -561,6 +563,60 @@ cpuTestCPUID(bool guest, const void *arg)
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 }
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+static int
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+cpuTestCPUIDBaseline(const void *arg)
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+{
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+    const struct data *data = arg;
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+    int ret = -1;
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+    virCPUDef **cpus = NULL;
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+    virCPUDef *baseline = NULL;
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+    g_autofree char *result = NULL;
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+    size_t i;
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+
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+    cpus = g_new0(virCPUDef *, data->ncpus);
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+    for (i = 0; i < data->ncpus; i++) {
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+        g_autofree char *name = NULL;
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+
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+        name = g_strdup_printf("cpuid-%s-json", data->cpus[i]);
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+        if (!(cpus[i] = cpuTestLoadXML(data->arch, name)))
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+            goto cleanup;
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+    }
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+
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+    baseline = virCPUBaseline(data->arch, cpus, data->ncpus, NULL, NULL, false);
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+    if (!baseline)
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+        goto cleanup;
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+
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+    result = g_strdup_printf("cpuid-baseline-%s", data->name);
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+
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+    if (cpuTestCompareXML(data->arch, baseline, result) < 0)
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+        goto cleanup;
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+
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+    for (i = 0; i < data->ncpus; i++) {
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+        virCPUCompareResult cmp;
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+
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+        cmp = virCPUCompare(data->arch, cpus[i], baseline, false);
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+        if (cmp != VIR_CPU_COMPARE_SUPERSET &&
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+            cmp != VIR_CPU_COMPARE_IDENTICAL) {
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+            VIR_TEST_VERBOSE("\nbaseline CPU is incompatible with CPU %zu", i);
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+            VIR_TEST_VERBOSE("%74s", "... ");
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+            ret = -1;
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+            goto cleanup;
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+        }
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+    }
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+
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+    ret = 0;
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+
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+ cleanup:
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+    if (cpus) {
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+        for (i = 0; i < data->ncpus; i++)
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+            virCPUDefFree(cpus[i]);
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+        VIR_FREE(cpus);
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+    }
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+    virCPUDefFree(baseline);
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+    return ret;
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+}
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+
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+
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 static int
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 cpuTestHostCPUID(const void *arg)
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 {
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@@ -888,13 +944,13 @@ mymain(void)
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         goto cleanup;
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     }
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-#define DO_TEST(arch, api, name, host, cpu, \
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+#define DO_TEST(arch, api, name, host, cpu, cpus, ncpus, \
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                 models, flags, result) \
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     do { \
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         struct data data = { \
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             arch, host, cpu, models, \
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             models == NULL ? NULL : #models, \
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-            flags, result \
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+            cpus, ncpus, flags, result \
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         }; \
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         g_autofree char *testLabel = NULL; \
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  \
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@@ -907,12 +963,12 @@ mymain(void)
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 #define DO_TEST_COMPARE(arch, host, cpu, result) \
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     DO_TEST(arch, cpuTestCompare, \
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             host "/" cpu " (" #result ")", \
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-            host, cpu, NULL, 0, result)
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+            host, cpu, NULL, 0, NULL, 0, result)
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 #define DO_TEST_UPDATE_ONLY(arch, host, cpu) \
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     DO_TEST(arch, cpuTestUpdate, \
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             cpu " on " host, \
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-            host, cpu, NULL, 0, 0)
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+            host, cpu, NULL, 0, NULL, 0, 0)
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 #define DO_TEST_UPDATE(arch, host, cpu, result) \
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     do { \
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@@ -930,31 +986,31 @@ mymain(void)
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             suffix = " (migratable)"; \
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         label = g_strdup_printf("%s%s", name, suffix); \
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         DO_TEST(arch, cpuTestBaseline, label, NULL, \
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-                "baseline-" name, NULL, flags, result); \
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+                "baseline-" name, NULL, 0, NULL, flags, result); \
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     } while (0)
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 #define DO_TEST_HASFEATURE(arch, host, feature, result) \
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     DO_TEST(arch, cpuTestHasFeature, \
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             host "/" feature " (" #result ")", \
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-            host, feature, NULL, 0, result)
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+            host, feature, NULL, 0, NULL, 0, result)
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 #define DO_TEST_GUESTCPU(arch, host, cpu, models, result) \
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     DO_TEST(arch, cpuTestGuestCPU, \
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             host "/" cpu " (" #models ")", \
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-            host, cpu, models, 0, result)
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+            host, cpu, NULL, 0, models, 0, result)
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 #if WITH_QEMU
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 # define DO_TEST_JSON(arch, host, json) \
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     do { \
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         if (json == JSON_MODELS) { \
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             DO_TEST(arch, cpuTestGuestCPUID, host, host, \
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-                    NULL, NULL, 0, 0); \
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+                    NULL, NULL, 0, NULL, 0, 0); \
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         } \
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         if (json != JSON_NONE) { \
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             DO_TEST(arch, cpuTestJSONCPUID, host, host, \
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-                    NULL, NULL, json, 0); \
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+                    NULL, NULL, 0, NULL, json, 0); \
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             DO_TEST(arch, cpuTestJSONSignature, host, host, \
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-                    NULL, NULL, 0, 0); \
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+                    NULL, NULL, 0, NULL, 0, 0); \
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         } \
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     } while (0)
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 #else
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@@ -964,18 +1020,26 @@ mymain(void)
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 #define DO_TEST_CPUID(arch, host, json) \
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     do { \
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         DO_TEST(arch, cpuTestHostCPUID, host, host, \
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-                NULL, NULL, 0, 0); \
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+                NULL, NULL, 0, NULL, 0, 0); \
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         DO_TEST(arch, cpuTestGuestCPUID, host, host, \
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-                NULL, NULL, json, 0); \
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+                NULL, NULL, 0, NULL, json, 0); \
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         DO_TEST(arch, cpuTestCPUIDSignature, host, host, \
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-                NULL, NULL, 0, 0); \
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+                NULL, NULL, 0, NULL, 0, 0); \
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         DO_TEST_JSON(arch, host, json); \
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         if (json != JSON_NONE) { \
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             DO_TEST(arch, cpuTestUpdateLive, host, host, \
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-                    NULL, NULL, json, 0); \
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+                    NULL, NULL, 0, NULL, json, 0); \
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         } \
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     } while (0)
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+#define DO_TEST_CPUID_BASELINE(arch, label, cpu1, cpu2) \
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+    do { \
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+        const char *cpus[] = {cpu1, cpu2}; \
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+        DO_TEST(arch, cpuTestCPUIDBaseline, \
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+                label " (" cpu1 ", " cpu2 ")", \
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+                NULL, label, cpus, 2, NULL, 0, 0); \
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+    } while (0)
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+
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     /* host to host comparison */
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     DO_TEST_COMPARE(VIR_ARCH_X86_64, "host", "host", VIR_CPU_COMPARE_IDENTICAL);
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     DO_TEST_COMPARE(VIR_ARCH_X86_64, "host", "host-better", VIR_CPU_COMPARE_INCOMPATIBLE);
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@@ -1157,6 +1221,32 @@ mymain(void)
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     DO_TEST_CPUID(VIR_ARCH_X86_64, "Ice-Lake-Server", JSON_MODELS);
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     DO_TEST_CPUID(VIR_ARCH_X86_64, "Cooperlake", JSON_MODELS);
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Ryzen+Rome",
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+                           "Ryzen-7-1800X-Eight-Core", "Ryzen-9-3900X-12-Core");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "EPYC+Rome",
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+                           "EPYC-7601-32-Core", "EPYC-7502-32-Core");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Skylake",
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+                           "Xeon-E5-2609-v3", "Xeon-Gold-6148");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Skylake-IBRS",
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+                           "Xeon-E5-2609-v3", "Xeon-Gold-6130");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Broadwell-IBRS+Cascadelake",
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+                           "Xeon-E5-2623-v4", "Xeon-Platinum-8268");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Skylake-IBRS",
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+                           "Xeon-Platinum-8268", "Xeon-Gold-6130");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Skylake",
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+                           "Xeon-Platinum-9242", "Xeon-Gold-6148");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Icelake",
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+                           "Xeon-Platinum-9242", "Ice-Lake-Server");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cooperlake+Icelake",
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+                           "Cooperlake", "Ice-Lake-Server");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cooperlake+Cascadelake",
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+                           "Cooperlake", "Xeon-Platinum-9242");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Skylake-Client+Server",
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+                           "Core-i5-6600", "Xeon-Gold-6148");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Broadwell",
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+                           "Xeon-E5-2609-v3", "Xeon-E5-2650-v4");
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+    DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell+Skylake",
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+                           "Xeon-E7-8890-v3", "Xeon-Gold-5115");
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  cleanup:
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 #if WITH_QEMU
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     qemuTestDriverFree(&driver);
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diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml
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new file mode 100644
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index 0000000000..4e3f253e9b
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml
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@@ -0,0 +1,11 @@
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+<cpu mode='custom' match='exact'>
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+  <model fallback='allow'>Skylake-Client-IBRS</model>
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+  <vendor>Intel</vendor>
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+  <feature policy='require' name='ss'/>
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+  <feature policy='require' name='hypervisor'/>
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+  <feature policy='require' name='tsc_adjust'/>
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+  <feature policy='require' name='pdpe1gb'/>
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+  <feature policy='disable' name='mpx'/>
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+  <feature policy='disable' name='xsavec'/>
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+  <feature policy='disable' name='xgetbv1'/>
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+</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml
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new file mode 100644
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index 0000000000..e372a3e446
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml
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@@ -0,0 +1,14 @@
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+<cpu mode='custom' match='exact'>
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+  <model fallback='allow'>Cooperlake</model>
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+  <vendor>Intel</vendor>
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+  <feature policy='require' name='ss'/>
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+  <feature policy='require' name='hypervisor'/>
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+  <feature policy='require' name='tsc_adjust'/>
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+  <feature policy='require' name='mpx'/>
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+  <feature policy='require' name='umip'/>
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+  <feature policy='require' name='xsaves'/>
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+  <feature policy='disable' name='avx512-bf16'/>
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+  <feature policy='disable' name='mds-no'/>
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+  <feature policy='disable' name='pschange-mc-no'/>
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+  <feature policy='disable' name='taa-no'/>
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+</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml
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new file mode 100644
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index 0000000000..e559e01583
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml
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@@ -0,0 +1,12 @@
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+<cpu mode='custom' match='exact'>
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+  <model fallback='allow'>Cascadelake-Server</model>
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+  <vendor>Intel</vendor>
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+  <feature policy='require' name='ss'/>
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+  <feature policy='require' name='hypervisor'/>
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+  <feature policy='require' name='tsc_adjust'/>
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+  <feature policy='require' name='umip'/>
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+  <feature policy='require' name='pku'/>
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+  <feature policy='require' name='xsaves'/>
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+  <feature policy='require' name='skip-l1dfl-vmentry'/>
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+  <feature policy='disable' name='avx512vnni'/>
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+</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml
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new file mode 100644
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index 0000000000..906259df0b
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml
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@@ -0,0 +1,8 @@
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+<cpu mode='custom' match='exact'>
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+  <model fallback='allow'>Skylake-Server</model>
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+  <vendor>Intel</vendor>
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+  <feature policy='require' name='ss'/>
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+  <feature policy='require' name='hypervisor'/>
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+  <feature policy='require' name='tsc_adjust'/>
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+  <feature policy='require' name='clflushopt'/>
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+</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml
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new file mode 100644
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index 0000000000..46c32c996f
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml
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@@ -0,0 +1,17 @@
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+<cpu mode='custom' match='exact'>
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+  <model fallback='allow'>Cooperlake</model>
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+  <vendor>Intel</vendor>
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+  <feature policy='require' name='ss'/>
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+  <feature policy='require' name='vmx'/>
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+  <feature policy='require' name='hypervisor'/>
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+  <feature policy='require' name='tsc_adjust'/>
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+  <feature policy='require' name='mpx'/>
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+  <feature policy='require' name='umip'/>
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+  <feature policy='require' name='md-clear'/>
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+  <feature policy='require' name='xsaves'/>
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+  <feature policy='require' name='ibpb'/>
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+  <feature policy='require' name='amd-ssbd'/>
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+  <feature policy='require' name='tsx-ctrl'/>
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+  <feature policy='disable' name='avx512-bf16'/>
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+  <feature policy='disable' name='taa-no'/>
abb18f
+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml
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new file mode 100644
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index 0000000000..e372a3e446
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml
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@@ -0,0 +1,14 @@
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+<cpu mode='custom' match='exact'>
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+  <model fallback='allow'>Cooperlake</model>
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+  <vendor>Intel</vendor>
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+  <feature policy='require' name='ss'/>
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+  <feature policy='require' name='hypervisor'/>
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+  <feature policy='require' name='tsc_adjust'/>
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+  <feature policy='require' name='mpx'/>
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+  <feature policy='require' name='umip'/>
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+  <feature policy='require' name='xsaves'/>
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+  <feature policy='disable' name='avx512-bf16'/>
abb18f
+  <feature policy='disable' name='mds-no'/>
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+  <feature policy='disable' name='pschange-mc-no'/>
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+  <feature policy='disable' name='taa-no'/>
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+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml b/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml
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new file mode 100644
abb18f
index 0000000000..e1984b2890
abb18f
--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml
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@@ -0,0 +1,13 @@
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+<cpu mode='custom' match='exact'>
abb18f
+  <model fallback='allow'>EPYC</model>
abb18f
+  <vendor>AMD</vendor>
abb18f
+  <feature policy='require' name='x2apic'/>
abb18f
+  <feature policy='require' name='tsc-deadline'/>
abb18f
+  <feature policy='require' name='hypervisor'/>
abb18f
+  <feature policy='require' name='tsc_adjust'/>
abb18f
+  <feature policy='require' name='cmp_legacy'/>
abb18f
+  <feature policy='require' name='npt'/>
abb18f
+  <feature policy='require' name='nrip-save'/>
abb18f
+  <feature policy='disable' name='svm'/>
abb18f
+  <feature policy='disable' name='monitor'/>
abb18f
+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml
abb18f
new file mode 100644
abb18f
index 0000000000..e687a679b3
abb18f
--- /dev/null
abb18f
+++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml
abb18f
@@ -0,0 +1,14 @@
abb18f
+<cpu mode='custom' match='exact'>
abb18f
+  <model fallback='allow'>Haswell</model>
abb18f
+  <vendor>Intel</vendor>
abb18f
+  <feature policy='require' name='vme'/>
abb18f
+  <feature policy='require' name='ss'/>
abb18f
+  <feature policy='require' name='f16c'/>
abb18f
+  <feature policy='require' name='rdrand'/>
abb18f
+  <feature policy='require' name='hypervisor'/>
abb18f
+  <feature policy='require' name='arat'/>
abb18f
+  <feature policy='require' name='tsc_adjust'/>
abb18f
+  <feature policy='require' name='xsaveopt'/>
abb18f
+  <feature policy='require' name='pdpe1gb'/>
abb18f
+  <feature policy='require' name='abm'/>
abb18f
+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml
abb18f
new file mode 100644
abb18f
index 0000000000..651457b17a
abb18f
--- /dev/null
abb18f
+++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml
abb18f
@@ -0,0 +1,14 @@
abb18f
+<cpu mode='custom' match='exact'>
abb18f
+  <model fallback='allow'>Haswell-noTSX</model>
abb18f
+  <vendor>Intel</vendor>
abb18f
+  <feature policy='require' name='vme'/>
abb18f
+  <feature policy='require' name='ss'/>
abb18f
+  <feature policy='require' name='f16c'/>
abb18f
+  <feature policy='require' name='rdrand'/>
abb18f
+  <feature policy='require' name='hypervisor'/>
abb18f
+  <feature policy='require' name='arat'/>
abb18f
+  <feature policy='require' name='tsc_adjust'/>
abb18f
+  <feature policy='require' name='xsaveopt'/>
abb18f
+  <feature policy='require' name='pdpe1gb'/>
abb18f
+  <feature policy='require' name='abm'/>
abb18f
+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml
abb18f
new file mode 100644
abb18f
index 0000000000..8bda1c02e2
abb18f
--- /dev/null
abb18f
+++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml
abb18f
@@ -0,0 +1,14 @@
abb18f
+<cpu mode='custom' match='exact'>
abb18f
+  <model fallback='allow'>Haswell-noTSX-IBRS</model>
abb18f
+  <vendor>Intel</vendor>
abb18f
+  <feature policy='require' name='vme'/>
abb18f
+  <feature policy='require' name='ss'/>
abb18f
+  <feature policy='require' name='f16c'/>
abb18f
+  <feature policy='require' name='rdrand'/>
abb18f
+  <feature policy='require' name='hypervisor'/>
abb18f
+  <feature policy='require' name='arat'/>
abb18f
+  <feature policy='require' name='tsc_adjust'/>
abb18f
+  <feature policy='require' name='xsaveopt'/>
abb18f
+  <feature policy='require' name='pdpe1gb'/>
abb18f
+  <feature policy='require' name='abm'/>
abb18f
+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml
abb18f
new file mode 100644
abb18f
index 0000000000..651457b17a
abb18f
--- /dev/null
abb18f
+++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml
abb18f
@@ -0,0 +1,14 @@
abb18f
+<cpu mode='custom' match='exact'>
abb18f
+  <model fallback='allow'>Haswell-noTSX</model>
abb18f
+  <vendor>Intel</vendor>
abb18f
+  <feature policy='require' name='vme'/>
abb18f
+  <feature policy='require' name='ss'/>
abb18f
+  <feature policy='require' name='f16c'/>
abb18f
+  <feature policy='require' name='rdrand'/>
abb18f
+  <feature policy='require' name='hypervisor'/>
abb18f
+  <feature policy='require' name='arat'/>
abb18f
+  <feature policy='require' name='tsc_adjust'/>
abb18f
+  <feature policy='require' name='xsaveopt'/>
abb18f
+  <feature policy='require' name='pdpe1gb'/>
abb18f
+  <feature policy='require' name='abm'/>
abb18f
+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml b/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml
abb18f
new file mode 100644
abb18f
index 0000000000..051402b9d5
abb18f
--- /dev/null
abb18f
+++ b/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml
abb18f
@@ -0,0 +1,13 @@
abb18f
+<cpu mode='custom' match='exact'>
abb18f
+  <model fallback='allow'>EPYC</model>
abb18f
+  <vendor>AMD</vendor>
abb18f
+  <feature policy='require' name='x2apic'/>
abb18f
+  <feature policy='require' name='tsc-deadline'/>
abb18f
+  <feature policy='require' name='hypervisor'/>
abb18f
+  <feature policy='require' name='tsc_adjust'/>
abb18f
+  <feature policy='require' name='cmp_legacy'/>
abb18f
+  <feature policy='require' name='npt'/>
abb18f
+  <feature policy='require' name='nrip-save'/>
abb18f
+  <feature policy='disable' name='sha-ni'/>
abb18f
+  <feature policy='disable' name='monitor'/>
abb18f
+</cpu>
abb18f
diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml b/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml
abb18f
new file mode 100644
abb18f
index 0000000000..d46ff26eeb
abb18f
--- /dev/null
abb18f
+++ b/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml
abb18f
@@ -0,0 +1,9 @@
abb18f
+<cpu mode='custom' match='exact'>
abb18f
+  <model fallback='allow'>Skylake-Client</model>
abb18f
+  <vendor>Intel</vendor>
abb18f
+  <feature policy='require' name='ss'/>
abb18f
+  <feature policy='require' name='hypervisor'/>
abb18f
+  <feature policy='require' name='tsc_adjust'/>
abb18f
+  <feature policy='require' name='clflushopt'/>
abb18f
+  <feature policy='require' name='pdpe1gb'/>
abb18f
+</cpu>
abb18f
-- 
abb18f
2.35.1
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