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b63792 |
diff -up openssl-1.1.1c/crypto/aes/asm/aesv8-armx.pl.arm-update openssl-1.1.1c/crypto/aes/asm/aesv8-armx.pl
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b63792 |
--- openssl-1.1.1c/crypto/aes/asm/aesv8-armx.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
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b63792 |
+++ openssl-1.1.1c/crypto/aes/asm/aesv8-armx.pl 2019-11-20 11:36:22.389506155 +0100
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b63792 |
@@ -27,44 +27,72 @@
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b63792 |
# CBC encrypt case. On Cortex-A57 parallelizable mode performance
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b63792 |
# seems to be limited by sheer amount of NEON instructions...
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b63792 |
#
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b63792 |
+# April 2019
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b63792 |
+#
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b63792 |
+# Key to performance of parallelize-able modes is round instruction
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b63792 |
+# interleaving. But which factor to use? There is optimal one for
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b63792 |
+# each combination of instruction latency and issue rate, beyond
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b63792 |
+# which increasing interleave factor doesn't pay off. While on cons
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b63792 |
+# side we have code size increase and resource waste on platforms for
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b63792 |
+# which interleave factor is too high. In other words you want it to
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b63792 |
+# be just right. So far interleave factor of 3x was serving well all
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b63792 |
+# platforms. But for ThunderX2 optimal interleave factor was measured
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b63792 |
+# to be 5x...
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b63792 |
+#
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b63792 |
# Performance in cycles per byte processed with 128-bit key:
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b63792 |
#
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b63792 |
# CBC enc CBC dec CTR
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b63792 |
# Apple A7 2.39 1.20 1.20
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b63792 |
-# Cortex-A53 1.32 1.29 1.46
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b63792 |
-# Cortex-A57(*) 1.95 0.85 0.93
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b63792 |
-# Denver 1.96 0.86 0.80
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b63792 |
-# Mongoose 1.33 1.20 1.20
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b63792 |
-# Kryo 1.26 0.94 1.00
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b63792 |
+# Cortex-A53 1.32 1.17/1.29(**) 1.36/1.46
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b63792 |
+# Cortex-A57(*) 1.95 0.82/0.85 0.89/0.93
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b63792 |
+# Cortex-A72 1.33 0.85/0.88 0.92/0.96
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b63792 |
+# Denver 1.96 0.65/0.86 0.76/0.80
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b63792 |
+# Mongoose 1.33 1.23/1.20 1.30/1.20
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b63792 |
+# Kryo 1.26 0.87/0.94 1.00/1.00
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b63792 |
+# ThunderX2 5.95 1.25 1.30
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b63792 |
#
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b63792 |
# (*) original 3.64/1.34/1.32 results were for r0p0 revision
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b63792 |
# and are still same even for updated module;
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b63792 |
+# (**) numbers after slash are for 32-bit code, which is 3x-
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b63792 |
+# interleaved;
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b63792 |
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b63792 |
-$flavour = shift;
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b63792 |
-$output = shift;
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b63792 |
+# $output is the last argument if it looks like a file (it has an extension)
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b63792 |
+# $flavour is the first argument if it doesn't look like a file
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b63792 |
+$output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
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b63792 |
+$flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
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b63792 |
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b63792 |
$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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b63792 |
( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
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b63792 |
( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
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b63792 |
die "can't locate arm-xlate.pl";
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b63792 |
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b63792 |
-open OUT,"| \"$^X\" $xlate $flavour $output";
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b63792 |
+open OUT,"| \"$^X\" $xlate $flavour \"$output\""
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b63792 |
+ or die "can't call $xlate: $!";
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b63792 |
*STDOUT=*OUT;
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b63792 |
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b63792 |
$prefix="aes_v8";
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b63792 |
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b63792 |
+$_byte = ($flavour =~ /win/ ? "DCB" : ".byte");
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b63792 |
+
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b63792 |
$code=<<___;
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b63792 |
#include "arm_arch.h"
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b63792 |
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b63792 |
#if __ARM_MAX_ARCH__>=7
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b63792 |
-.text
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b63792 |
___
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b63792 |
-$code.=".arch armv8-a+crypto\n" if ($flavour =~ /64/);
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b63792 |
+$code.=".arch armv8-a+crypto\n.text\n" if ($flavour =~ /64/);
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b63792 |
$code.=<<___ if ($flavour !~ /64/);
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b63792 |
.arch armv7-a // don't confuse not-so-latest binutils with argv8 :-)
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b63792 |
.fpu neon
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b63792 |
+#ifdef __thumb2__
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b63792 |
+.syntax unified
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b63792 |
+.thumb
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b63792 |
+# define INST(a,b,c,d) $_byte c,d|0xc,a,b
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b63792 |
+#else
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b63792 |
.code 32
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b63792 |
-#undef __thumb2__
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b63792 |
+# define INST(a,b,c,d) $_byte a,b,c,d
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b63792 |
+#endif
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b63792 |
+
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b63792 |
+.text
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b63792 |
___
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b63792 |
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b63792 |
# Assembler mnemonics are an eclectic mix of 32- and 64-bit syntax,
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b63792 |
@@ -514,6 +542,13 @@ $code.=<<___;
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b63792 |
___
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b63792 |
{
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b63792 |
my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
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b63792 |
+
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b63792 |
+my ($dat3,$in3,$tmp3); # used only in 64-bit mode
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b63792 |
+my ($dat4,$in4,$tmp4);
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b63792 |
+if ($flavour =~ /64/) {
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b63792 |
+ ($dat2,$dat3,$dat4,$in2,$in3,$in4,$tmp3,$tmp4)=map("q$_",(16..23));
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b63792 |
+}
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b63792 |
+
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b63792 |
$code.=<<___;
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b63792 |
.align 5
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b63792 |
.Lcbc_dec:
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b63792 |
@@ -530,7 +565,196 @@ $code.=<<___;
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b63792 |
vorr $in0,$dat,$dat
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b63792 |
vorr $in1,$dat1,$dat1
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b63792 |
vorr $in2,$dat2,$dat2
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b63792 |
+___
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b63792 |
+$code.=<<___ if ($flavour =~ /64/);
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b63792 |
+ cmp $len,#32
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b63792 |
+ b.lo .Loop3x_cbc_dec
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b63792 |
+
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b63792 |
+ vld1.8 {$dat3},[$inp],#16
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b63792 |
+ vld1.8 {$dat4},[$inp],#16
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b63792 |
+ sub $len,$len,#32 // bias
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b63792 |
+ mov $cnt,$rounds
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b63792 |
+ vorr $in3,$dat3,$dat3
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b63792 |
+ vorr $in4,$dat4,$dat4
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b63792 |
+
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b63792 |
+.Loop5x_cbc_dec:
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b63792 |
+ aesd $dat0,q8
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q8
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q8
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q8
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q8
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+ vld1.32 {q8},[$key_],#16
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b63792 |
+ subs $cnt,$cnt,#2
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b63792 |
+ aesd $dat0,q9
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q9
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q9
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q9
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q9
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+ vld1.32 {q9},[$key_],#16
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b63792 |
+ b.gt .Loop5x_cbc_dec
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b63792 |
+
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b63792 |
+ aesd $dat0,q8
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q8
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q8
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q8
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q8
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+ cmp $len,#0x40 // because .Lcbc_tail4x
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b63792 |
+ sub $len,$len,#0x50
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b63792 |
+
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b63792 |
+ aesd $dat0,q9
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q9
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q9
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q9
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q9
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+ csel x6,xzr,$len,gt // borrow x6, $cnt, "gt" is not typo
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b63792 |
+ mov $key_,$key
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b63792 |
+
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b63792 |
+ aesd $dat0,q10
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q10
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q10
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q10
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q10
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+ add $inp,$inp,x6 // $inp is adjusted in such way that
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b63792 |
+ // at exit from the loop $dat1-$dat4
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b63792 |
+ // are loaded with last "words"
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b63792 |
+ add x6,$len,#0x60 // because .Lcbc_tail4x
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b63792 |
+
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b63792 |
+ aesd $dat0,q11
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q11
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q11
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q11
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q11
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+
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b63792 |
+ aesd $dat0,q12
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q12
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q12
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q12
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q12
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+
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b63792 |
+ aesd $dat0,q13
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q13
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q13
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q13
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q13
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+
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b63792 |
+ aesd $dat0,q14
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b63792 |
+ aesimc $dat0,$dat0
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b63792 |
+ aesd $dat1,q14
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b63792 |
+ aesimc $dat1,$dat1
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b63792 |
+ aesd $dat2,q14
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b63792 |
+ aesimc $dat2,$dat2
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b63792 |
+ aesd $dat3,q14
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b63792 |
+ aesimc $dat3,$dat3
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b63792 |
+ aesd $dat4,q14
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b63792 |
+ aesimc $dat4,$dat4
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b63792 |
+
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b63792 |
+ veor $tmp0,$ivec,$rndlast
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b63792 |
+ aesd $dat0,q15
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b63792 |
+ veor $tmp1,$in0,$rndlast
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b63792 |
+ vld1.8 {$in0},[$inp],#16
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b63792 |
+ aesd $dat1,q15
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b63792 |
+ veor $tmp2,$in1,$rndlast
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b63792 |
+ vld1.8 {$in1},[$inp],#16
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b63792 |
+ aesd $dat2,q15
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b63792 |
+ veor $tmp3,$in2,$rndlast
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|
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b63792 |
+ vld1.8 {$in2},[$inp],#16
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b63792 |
+ aesd $dat3,q15
|
|
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b63792 |
+ veor $tmp4,$in3,$rndlast
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|
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b63792 |
+ vld1.8 {$in3},[$inp],#16
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|
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b63792 |
+ aesd $dat4,q15
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|
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b63792 |
+ vorr $ivec,$in4,$in4
|
|
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b63792 |
+ vld1.8 {$in4},[$inp],#16
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|
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b63792 |
+ cbz x6,.Lcbc_tail4x
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|
|
b63792 |
+ vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
|
|
|
b63792 |
+ veor $tmp0,$tmp0,$dat0
|
|
|
b63792 |
+ vorr $dat0,$in0,$in0
|
|
|
b63792 |
+ veor $tmp1,$tmp1,$dat1
|
|
|
b63792 |
+ vorr $dat1,$in1,$in1
|
|
|
b63792 |
+ veor $tmp2,$tmp2,$dat2
|
|
|
b63792 |
+ vorr $dat2,$in2,$in2
|
|
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b63792 |
+ veor $tmp3,$tmp3,$dat3
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|
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b63792 |
+ vorr $dat3,$in3,$in3
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|
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b63792 |
+ veor $tmp4,$tmp4,$dat4
|
|
|
b63792 |
+ vst1.8 {$tmp0},[$out],#16
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|
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b63792 |
+ vorr $dat4,$in4,$in4
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|
|
b63792 |
+ vst1.8 {$tmp1},[$out],#16
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|
|
b63792 |
+ mov $cnt,$rounds
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|
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b63792 |
+ vst1.8 {$tmp2},[$out],#16
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|
|
b63792 |
+ vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
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b63792 |
+ vst1.8 {$tmp3},[$out],#16
|
|
|
b63792 |
+ vst1.8 {$tmp4},[$out],#16
|
|
|
b63792 |
+ b.hs .Loop5x_cbc_dec
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|
|
b63792 |
+
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|
|
b63792 |
+ add $len,$len,#0x50
|
|
|
b63792 |
+ cbz $len,.Lcbc_done
|
|
|
b63792 |
+
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|
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b63792 |
+ add $cnt,$rounds,#2
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|
|
b63792 |
+ subs $len,$len,#0x30
|
|
|
b63792 |
+ vorr $dat0,$in2,$in2
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|
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b63792 |
+ vorr $in0,$in2,$in2
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|
|
b63792 |
+ vorr $dat1,$in3,$in3
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|
|
b63792 |
+ vorr $in1,$in3,$in3
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|
|
b63792 |
+ vorr $dat2,$in4,$in4
|
|
|
b63792 |
+ vorr $in2,$in4,$in4
|
|
|
b63792 |
+ b.lo .Lcbc_dec_tail
|
|
|
b63792 |
+
|
|
|
b63792 |
+ b .Loop3x_cbc_dec
|
|
|
b63792 |
|
|
|
b63792 |
+.align 4
|
|
|
b63792 |
+.Lcbc_tail4x:
|
|
|
b63792 |
+ veor $tmp1,$tmp0,$dat1
|
|
|
b63792 |
+ veor $tmp2,$tmp2,$dat2
|
|
|
b63792 |
+ veor $tmp3,$tmp3,$dat3
|
|
|
b63792 |
+ veor $tmp4,$tmp4,$dat4
|
|
|
b63792 |
+ vst1.8 {$tmp1},[$out],#16
|
|
|
b63792 |
+ vst1.8 {$tmp2},[$out],#16
|
|
|
b63792 |
+ vst1.8 {$tmp3},[$out],#16
|
|
|
b63792 |
+ vst1.8 {$tmp4},[$out],#16
|
|
|
b63792 |
+
|
|
|
b63792 |
+ b .Lcbc_done
|
|
|
b63792 |
+.align 4
|
|
|
b63792 |
+___
|
|
|
b63792 |
+$code.=<<___;
|
|
|
b63792 |
.Loop3x_cbc_dec:
|
|
|
b63792 |
aesd $dat0,q8
|
|
|
b63792 |
aesimc $dat0,$dat0
|
|
|
b63792 |
@@ -691,6 +915,9 @@ my $step="x12"; # aliases with $tctr2
|
|
|
b63792 |
my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$ivec,$rndlast)=map("q$_",(0..7));
|
|
|
b63792 |
my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
|
|
|
b63792 |
|
|
|
b63792 |
+# used only in 64-bit mode...
|
|
|
b63792 |
+my ($dat3,$dat4,$in3,$in4)=map("q$_",(16..23));
|
|
|
b63792 |
+
|
|
|
b63792 |
my ($dat,$tmp)=($dat0,$tmp0);
|
|
|
b63792 |
|
|
|
b63792 |
### q8-q15 preloaded key schedule
|
|
|
b63792 |
@@ -743,6 +970,175 @@ $code.=<<___;
|
|
|
b63792 |
rev $tctr2, $ctr
|
|
|
b63792 |
sub $len,$len,#3 // bias
|
|
|
b63792 |
vmov.32 ${dat2}[3],$tctr2
|
|
|
b63792 |
+___
|
|
|
b63792 |
+$code.=<<___ if ($flavour =~ /64/);
|
|
|
b63792 |
+ cmp $len,#2
|
|
|
b63792 |
+ b.lo .Loop3x_ctr32
|
|
|
b63792 |
+
|
|
|
b63792 |
+ add w13,$ctr,#1
|
|
|
b63792 |
+ add w14,$ctr,#2
|
|
|
b63792 |
+ vorr $dat3,$dat0,$dat0
|
|
|
b63792 |
+ rev w13,w13
|
|
|
b63792 |
+ vorr $dat4,$dat0,$dat0
|
|
|
b63792 |
+ rev w14,w14
|
|
|
b63792 |
+ vmov.32 ${dat3}[3],w13
|
|
|
b63792 |
+ sub $len,$len,#2 // bias
|
|
|
b63792 |
+ vmov.32 ${dat4}[3],w14
|
|
|
b63792 |
+ add $ctr,$ctr,#2
|
|
|
b63792 |
+ b .Loop5x_ctr32
|
|
|
b63792 |
+
|
|
|
b63792 |
+.align 4
|
|
|
b63792 |
+.Loop5x_ctr32:
|
|
|
b63792 |
+ aese $dat0,q8
|
|
|
b63792 |
+ aesmc $dat0,$dat0
|
|
|
b63792 |
+ aese $dat1,q8
|
|
|
b63792 |
+ aesmc $dat1,$dat1
|
|
|
b63792 |
+ aese $dat2,q8
|
|
|
b63792 |
+ aesmc $dat2,$dat2
|
|
|
b63792 |
+ aese $dat3,q8
|
|
|
b63792 |
+ aesmc $dat3,$dat3
|
|
|
b63792 |
+ aese $dat4,q8
|
|
|
b63792 |
+ aesmc $dat4,$dat4
|
|
|
b63792 |
+ vld1.32 {q8},[$key_],#16
|
|
|
b63792 |
+ subs $cnt,$cnt,#2
|
|
|
b63792 |
+ aese $dat0,q9
|
|
|
b63792 |
+ aesmc $dat0,$dat0
|
|
|
b63792 |
+ aese $dat1,q9
|
|
|
b63792 |
+ aesmc $dat1,$dat1
|
|
|
b63792 |
+ aese $dat2,q9
|
|
|
b63792 |
+ aesmc $dat2,$dat2
|
|
|
b63792 |
+ aese $dat3,q9
|
|
|
b63792 |
+ aesmc $dat3,$dat3
|
|
|
b63792 |
+ aese $dat4,q9
|
|
|
b63792 |
+ aesmc $dat4,$dat4
|
|
|
b63792 |
+ vld1.32 {q9},[$key_],#16
|
|
|
b63792 |
+ b.gt .Loop5x_ctr32
|
|
|
b63792 |
+
|
|
|
b63792 |
+ mov $key_,$key
|
|
|
b63792 |
+ aese $dat0,q8
|
|
|
b63792 |
+ aesmc $dat0,$dat0
|
|
|
b63792 |
+ aese $dat1,q8
|
|
|
b63792 |
+ aesmc $dat1,$dat1
|
|
|
b63792 |
+ aese $dat2,q8
|
|
|
b63792 |
+ aesmc $dat2,$dat2
|
|
|
b63792 |
+ aese $dat3,q8
|
|
|
b63792 |
+ aesmc $dat3,$dat3
|
|
|
b63792 |
+ aese $dat4,q8
|
|
|
b63792 |
+ aesmc $dat4,$dat4
|
|
|
b63792 |
+ vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
|
|
|
b63792 |
+
|
|
|
b63792 |
+ aese $dat0,q9
|
|
|
b63792 |
+ aesmc $dat0,$dat0
|
|
|
b63792 |
+ aese $dat1,q9
|
|
|
b63792 |
+ aesmc $dat1,$dat1
|
|
|
b63792 |
+ aese $dat2,q9
|
|
|
b63792 |
+ aesmc $dat2,$dat2
|
|
|
b63792 |
+ aese $dat3,q9
|
|
|
b63792 |
+ aesmc $dat3,$dat3
|
|
|
b63792 |
+ aese $dat4,q9
|
|
|
b63792 |
+ aesmc $dat4,$dat4
|
|
|
b63792 |
+ vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
|
|
|
b63792 |
+
|
|
|
b63792 |
+ aese $dat0,q12
|
|
|
b63792 |
+ aesmc $dat0,$dat0
|
|
|
b63792 |
+ add $tctr0,$ctr,#1
|
|
|
b63792 |
+ add $tctr1,$ctr,#2
|
|
|
b63792 |
+ aese $dat1,q12
|
|
|
b63792 |
+ aesmc $dat1,$dat1
|
|
|
b63792 |
+ add $tctr2,$ctr,#3
|
|
|
b63792 |
+ add w13,$ctr,#4
|
|
|
b63792 |
+ aese $dat2,q12
|
|
|
b63792 |
+ aesmc $dat2,$dat2
|
|
|
b63792 |
+ add w14,$ctr,#5
|
|
|
b63792 |
+ rev $tctr0,$tctr0
|
|
|
b63792 |
+ aese $dat3,q12
|
|
|
b63792 |
+ aesmc $dat3,$dat3
|
|
|
b63792 |
+ rev $tctr1,$tctr1
|
|
|
b63792 |
+ rev $tctr2,$tctr2
|
|
|
b63792 |
+ aese $dat4,q12
|
|
|
b63792 |
+ aesmc $dat4,$dat4
|
|
|
b63792 |
+ rev w13,w13
|
|
|
b63792 |
+ rev w14,w14
|
|
|
b63792 |
+
|
|
|
b63792 |
+ aese $dat0,q13
|
|
|
b63792 |
+ aesmc $dat0,$dat0
|
|
|
b63792 |
+ aese $dat1,q13
|
|
|
b63792 |
+ aesmc $dat1,$dat1
|
|
|
b63792 |
+ aese $dat2,q13
|
|
|
b63792 |
+ aesmc $dat2,$dat2
|
|
|
b63792 |
+ aese $dat3,q13
|
|
|
b63792 |
+ aesmc $dat3,$dat3
|
|
|
b63792 |
+ aese $dat4,q13
|
|
|
b63792 |
+ aesmc $dat4,$dat4
|
|
|
b63792 |
+
|
|
|
b63792 |
+ aese $dat0,q14
|
|
|
b63792 |
+ aesmc $dat0,$dat0
|
|
|
b63792 |
+ vld1.8 {$in0},[$inp],#16
|
|
|
b63792 |
+ aese $dat1,q14
|
|
|
b63792 |
+ aesmc $dat1,$dat1
|
|
|
b63792 |
+ vld1.8 {$in1},[$inp],#16
|
|
|
b63792 |
+ aese $dat2,q14
|
|
|
b63792 |
+ aesmc $dat2,$dat2
|
|
|
b63792 |
+ vld1.8 {$in2},[$inp],#16
|
|
|
b63792 |
+ aese $dat3,q14
|
|
|
b63792 |
+ aesmc $dat3,$dat3
|
|
|
b63792 |
+ vld1.8 {$in3},[$inp],#16
|
|
|
b63792 |
+ aese $dat4,q14
|
|
|
b63792 |
+ aesmc $dat4,$dat4
|
|
|
b63792 |
+ vld1.8 {$in4},[$inp],#16
|
|
|
b63792 |
+
|
|
|
b63792 |
+ aese $dat0,q15
|
|
|
b63792 |
+ veor $in0,$in0,$rndlast
|
|
|
b63792 |
+ aese $dat1,q15
|
|
|
b63792 |
+ veor $in1,$in1,$rndlast
|
|
|
b63792 |
+ aese $dat2,q15
|
|
|
b63792 |
+ veor $in2,$in2,$rndlast
|
|
|
b63792 |
+ aese $dat3,q15
|
|
|
b63792 |
+ veor $in3,$in3,$rndlast
|
|
|
b63792 |
+ aese $dat4,q15
|
|
|
b63792 |
+ veor $in4,$in4,$rndlast
|
|
|
b63792 |
+
|
|
|
b63792 |
+ veor $in0,$in0,$dat0
|
|
|
b63792 |
+ vorr $dat0,$ivec,$ivec
|
|
|
b63792 |
+ veor $in1,$in1,$dat1
|
|
|
b63792 |
+ vorr $dat1,$ivec,$ivec
|
|
|
b63792 |
+ veor $in2,$in2,$dat2
|
|
|
b63792 |
+ vorr $dat2,$ivec,$ivec
|
|
|
b63792 |
+ veor $in3,$in3,$dat3
|
|
|
b63792 |
+ vorr $dat3,$ivec,$ivec
|
|
|
b63792 |
+ veor $in4,$in4,$dat4
|
|
|
b63792 |
+ vorr $dat4,$ivec,$ivec
|
|
|
b63792 |
+
|
|
|
b63792 |
+ vst1.8 {$in0},[$out],#16
|
|
|
b63792 |
+ vmov.32 ${dat0}[3],$tctr0
|
|
|
b63792 |
+ vst1.8 {$in1},[$out],#16
|
|
|
b63792 |
+ vmov.32 ${dat1}[3],$tctr1
|
|
|
b63792 |
+ vst1.8 {$in2},[$out],#16
|
|
|
b63792 |
+ vmov.32 ${dat2}[3],$tctr2
|
|
|
b63792 |
+ vst1.8 {$in3},[$out],#16
|
|
|
b63792 |
+ vmov.32 ${dat3}[3],w13
|
|
|
b63792 |
+ vst1.8 {$in4},[$out],#16
|
|
|
b63792 |
+ vmov.32 ${dat4}[3],w14
|
|
|
b63792 |
+
|
|
|
b63792 |
+ mov $cnt,$rounds
|
|
|
b63792 |
+ cbz $len,.Lctr32_done
|
|
|
b63792 |
+
|
|
|
b63792 |
+ add $ctr,$ctr,#5
|
|
|
b63792 |
+ subs $len,$len,#5
|
|
|
b63792 |
+ b.hs .Loop5x_ctr32
|
|
|
b63792 |
+
|
|
|
b63792 |
+ add $len,$len,#5
|
|
|
b63792 |
+ sub $ctr,$ctr,#5
|
|
|
b63792 |
+
|
|
|
b63792 |
+ cmp $len,#2
|
|
|
b63792 |
+ mov $step,#16
|
|
|
b63792 |
+ cclr $step,lo
|
|
|
b63792 |
+ b.ls .Lctr32_tail
|
|
|
b63792 |
+
|
|
|
b63792 |
+ sub $len,$len,#3 // bias
|
|
|
b63792 |
+ add $ctr,$ctr,#3
|
|
|
b63792 |
+___
|
|
|
b63792 |
+$code.=<<___;
|
|
|
b63792 |
b .Loop3x_ctr32
|
|
|
b63792 |
|
|
|
b63792 |
.align 4
|
|
|
b63792 |
@@ -955,7 +1351,7 @@ if ($flavour =~ /64/) { ######## 64-bi
|
|
|
b63792 |
# since ARMv7 instructions are always encoded little-endian.
|
|
|
b63792 |
# correct solution is to use .inst directive, but older
|
|
|
b63792 |
# assemblers don't implement it:-(
|
|
|
b63792 |
- sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
|
|
|
b63792 |
+ sprintf "INST(0x%02x,0x%02x,0x%02x,0x%02x)\t@ %s %s",
|
|
|
b63792 |
$word&0xff,($word>>8)&0xff,
|
|
|
b63792 |
($word>>16)&0xff,($word>>24)&0xff,
|
|
|
b63792 |
$mnemonic,$arg;
|
|
|
b63792 |
@@ -996,14 +1392,17 @@ if ($flavour =~ /64/) { ######## 64-bi
|
|
|
b63792 |
s/\],#[0-9]+/]!/o;
|
|
|
b63792 |
|
|
|
b63792 |
s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
|
|
|
b63792 |
- s/cclr\s+([^,]+),\s*([a-z]+)/mov$2 $1,#0/o or
|
|
|
b63792 |
+ s/cclr\s+([^,]+),\s*([a-z]+)/mov.$2 $1,#0/o or
|
|
|
b63792 |
s/vtbl\.8\s+(.*)/unvtbl($1)/geo or
|
|
|
b63792 |
s/vdup\.32\s+(.*)/unvdup32($1)/geo or
|
|
|
b63792 |
s/vmov\.32\s+(.*)/unvmov32($1)/geo or
|
|
|
b63792 |
s/^(\s+)b\./$1b/o or
|
|
|
b63792 |
- s/^(\s+)mov\./$1mov/o or
|
|
|
b63792 |
s/^(\s+)ret/$1bx\tlr/o;
|
|
|
b63792 |
|
|
|
b63792 |
+ if (s/^(\s+)mov\.([a-z]+)/$1mov$2/) {
|
|
|
b63792 |
+ print " it $2\n";
|
|
|
b63792 |
+ }
|
|
|
b63792 |
+
|
|
|
b63792 |
print $_,"\n";
|
|
|
b63792 |
}
|
|
|
b63792 |
}
|
|
|
b63792 |
diff -up openssl-1.1.1c/crypto/aes/asm/vpaes-armv8.pl.arm-update openssl-1.1.1c/crypto/aes/asm/vpaes-armv8.pl
|
|
|
b63792 |
--- openssl-1.1.1c/crypto/aes/asm/vpaes-armv8.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
|
|
|
b63792 |
+++ openssl-1.1.1c/crypto/aes/asm/vpaes-armv8.pl 2019-11-20 11:36:22.389506155 +0100
|
|
|
b63792 |
@@ -30,6 +30,7 @@
|
|
|
b63792 |
# Denver(***) 16.6(**) 15.1/17.8(**) [8.80/9.93 ]
|
|
|
b63792 |
# Apple A7(***) 22.7(**) 10.9/14.3 [8.45/10.0 ]
|
|
|
b63792 |
# Mongoose(***) 26.3(**) 21.0/25.0(**) [13.3/16.8 ]
|
|
|
b63792 |
+# ThunderX2(***) 39.4(**) 33.8/48.6(**)
|
|
|
b63792 |
#
|
|
|
b63792 |
# (*) ECB denotes approximate result for parallelizable modes
|
|
|
b63792 |
# such as CBC decrypt, CTR, etc.;
|
|
|
b63792 |
diff -up openssl-1.1.1c/crypto/chacha/asm/chacha-armv8.pl.arm-update openssl-1.1.1c/crypto/chacha/asm/chacha-armv8.pl
|
|
|
b63792 |
--- openssl-1.1.1c/crypto/chacha/asm/chacha-armv8.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
|
|
|
b63792 |
+++ openssl-1.1.1c/crypto/chacha/asm/chacha-armv8.pl 2019-11-21 16:44:50.814651553 +0100
|
|
|
b63792 |
@@ -18,32 +18,44 @@
|
|
|
b63792 |
#
|
|
|
b63792 |
# ChaCha20 for ARMv8.
|
|
|
b63792 |
#
|
|
|
b63792 |
+# April 2019
|
|
|
b63792 |
+#
|
|
|
b63792 |
+# Replace 3xNEON+1xIALU code path with 4+1. 4+1 is actually fastest
|
|
|
b63792 |
+# option on most(*), but not all, processors, yet 6+2 is retained.
|
|
|
b63792 |
+# This is because penalties are considered tolerable in comparison to
|
|
|
b63792 |
+# improvement on processors where 6+2 helps. Most notably +37% on
|
|
|
b63792 |
+# ThunderX2. It's server-oriented processor which will have to serve
|
|
|
b63792 |
+# as many requests as possible. While others are mostly clients, when
|
|
|
b63792 |
+# performance doesn't have to be absolute top-notch, just fast enough,
|
|
|
b63792 |
+# as majority of time is spent "entertaining" relatively slow human.
|
|
|
b63792 |
+#
|
|
|
b63792 |
# Performance in cycles per byte out of large buffer.
|
|
|
b63792 |
#
|
|
|
b63792 |
-# IALU/gcc-4.9 3xNEON+1xIALU 6xNEON+2xIALU
|
|
|
b63792 |
+# IALU/gcc-4.9 4xNEON+1xIALU 6xNEON+2xIALU
|
|
|
b63792 |
#
|
|
|
b63792 |
-# Apple A7 5.50/+49% 3.33 1.70
|
|
|
b63792 |
-# Cortex-A53 8.40/+80% 4.72 4.72(*)
|
|
|
b63792 |
-# Cortex-A57 8.06/+43% 4.90 4.43(**)
|
|
|
b63792 |
-# Denver 4.50/+82% 2.63 2.67(*)
|
|
|
b63792 |
-# X-Gene 9.50/+46% 8.82 8.89(*)
|
|
|
b63792 |
-# Mongoose 8.00/+44% 3.64 3.25
|
|
|
b63792 |
-# Kryo 8.17/+50% 4.83 4.65
|
|
|
b63792 |
+# Apple A7 5.50/+49% 2.72 1.60
|
|
|
b63792 |
+# Cortex-A53 8.40/+80% 4.06 4.45(*)
|
|
|
b63792 |
+# Cortex-A57 8.06/+43% 4.15 4.40(*)
|
|
|
b63792 |
+# Denver 4.50/+82% 2.30 2.70(*)
|
|
|
b63792 |
+# X-Gene 9.50/+46% 8.20 8.90(*)
|
|
|
b63792 |
+# Mongoose 8.00/+44% 2.74 3.12(*)
|
|
|
b63792 |
+# Kryo 8.17/+50% 4.47 4.65(*)
|
|
|
b63792 |
+# ThunderX2 7.22/+48% 5.64 4.10
|
|
|
b63792 |
#
|
|
|
b63792 |
-# (*) it's expected that doubling interleave factor doesn't help
|
|
|
b63792 |
-# all processors, only those with higher NEON latency and
|
|
|
b63792 |
-# higher instruction issue rate;
|
|
|
b63792 |
-# (**) expected improvement was actually higher;
|
|
|
b63792 |
+# (*) slower than 4+1:-(
|
|
|
b63792 |
|
|
|
b63792 |
-$flavour=shift;
|
|
|
b63792 |
-$output=shift;
|
|
|
b63792 |
+# $output is the last argument if it looks like a file (it has an extension)
|
|
|
b63792 |
+# $flavour is the first argument if it doesn't look like a file
|
|
|
b63792 |
+$output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
|
|
|
b63792 |
+$flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
|
|
|
b63792 |
|
|
|
b63792 |
$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
|
|
|
b63792 |
( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
|
|
|
b63792 |
( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
|
|
|
b63792 |
die "can't locate arm-xlate.pl";
|
|
|
b63792 |
|
|
|
b63792 |
-open OUT,"| \"$^X\" $xlate $flavour $output";
|
|
|
b63792 |
+open OUT,"| \"$^X\" $xlate $flavour \"$output\""
|
|
|
b63792 |
+ or die "can't call $xlate: $!";
|
|
|
b63792 |
*STDOUT=*OUT;
|
|
|
b63792 |
|
|
|
b63792 |
sub AUTOLOAD() # thunk [simplified] x86-style perlasm
|
|
|
b63792 |
@@ -120,41 +132,36 @@ my ($a3,$b3,$c3,$d3)=map(($_&~3)+(($_+1)
|
|
|
b63792 |
}
|
|
|
b63792 |
|
|
|
b63792 |
$code.=<<___;
|
|
|
b63792 |
-#include "arm_arch.h"
|
|
|
b63792 |
+#ifndef __KERNEL__
|
|
|
b63792 |
+# include "arm_arch.h"
|
|
|
b63792 |
+.extern OPENSSL_armcap_P
|
|
|
b63792 |
+#endif
|
|
|
b63792 |
|
|
|
b63792 |
.text
|
|
|
b63792 |
|
|
|
b63792 |
-.extern OPENSSL_armcap_P
|
|
|
b63792 |
-
|
|
|
b63792 |
.align 5
|
|
|
b63792 |
.Lsigma:
|
|
|
b63792 |
.quad 0x3320646e61707865,0x6b20657479622d32 // endian-neutral
|
|
|
b63792 |
.Lone:
|
|
|
b63792 |
-.long 1,0,0,0
|
|
|
b63792 |
-.LOPENSSL_armcap_P:
|
|
|
b63792 |
-#ifdef __ILP32__
|
|
|
b63792 |
-.long OPENSSL_armcap_P-.
|
|
|
b63792 |
-#else
|
|
|
b63792 |
-.quad OPENSSL_armcap_P-.
|
|
|
b63792 |
-#endif
|
|
|
b63792 |
-.asciz "ChaCha20 for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
|
|
|
b63792 |
+.long 1,2,3,4
|
|
|
b63792 |
+.Lrot24:
|
|
|
b63792 |
+.long 0x02010003,0x06050407,0x0a09080b,0x0e0d0c0f
|
|
|
b63792 |
+.asciz "ChaCha20 for ARMv8, CRYPTOGAMS by \@dot-asm"
|
|
|
b63792 |
|
|
|
b63792 |
.globl ChaCha20_ctr32
|
|
|
b63792 |
.type ChaCha20_ctr32,%function
|
|
|
b63792 |
.align 5
|
|
|
b63792 |
ChaCha20_ctr32:
|
|
|
b63792 |
cbz $len,.Labort
|
|
|
b63792 |
- adr @x[0],.LOPENSSL_armcap_P
|
|
|
b63792 |
cmp $len,#192
|
|
|
b63792 |
b.lo .Lshort
|
|
|
b63792 |
-#ifdef __ILP32__
|
|
|
b63792 |
- ldrsw @x[1],[@x[0]]
|
|
|
b63792 |
-#else
|
|
|
b63792 |
- ldr @x[1],[@x[0]]
|
|
|
b63792 |
-#endif
|
|
|
b63792 |
- ldr w17,[@x[1],@x[0]]
|
|
|
b63792 |
+
|
|
|
b63792 |
+#ifndef __KERNEL__
|
|
|
b63792 |
+ adrp x17,OPENSSL_armcap_P
|
|
|
b63792 |
+ ldr w17,[x17,#:lo12:OPENSSL_armcap_P]
|
|
|
b63792 |
tst w17,#ARMV7_NEON
|
|
|
b63792 |
- b.ne ChaCha20_neon
|
|
|
b63792 |
+ b.ne .LChaCha20_neon
|
|
|
b63792 |
+#endif
|
|
|
b63792 |
|
|
|
b63792 |
.Lshort:
|
|
|
b63792 |
.inst 0xd503233f // paciasp
|
|
|
b63792 |
@@ -173,7 +180,7 @@ ChaCha20_ctr32:
|
|
|
b63792 |
ldp @d[2],@d[3],[$key] // load key
|
|
|
b63792 |
ldp @d[4],@d[5],[$key,#16]
|
|
|
b63792 |
ldp @d[6],@d[7],[$ctr] // load counter
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
ror @d[2],@d[2],#32
|
|
|
b63792 |
ror @d[3],@d[3],#32
|
|
|
b63792 |
ror @d[4],@d[4],#32
|
|
|
b63792 |
@@ -242,7 +249,7 @@ $code.=<<___;
|
|
|
b63792 |
add @x[14],@x[14],@x[15],lsl#32
|
|
|
b63792 |
ldp @x[13],@x[15],[$inp,#48]
|
|
|
b63792 |
add $inp,$inp,#64
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev @x[0],@x[0]
|
|
|
b63792 |
rev @x[2],@x[2]
|
|
|
b63792 |
rev @x[4],@x[4]
|
|
|
b63792 |
@@ -299,7 +306,7 @@ $code.=<<___;
|
|
|
b63792 |
add @x[10],@x[10],@x[11],lsl#32
|
|
|
b63792 |
add @x[12],@x[12],@x[13],lsl#32
|
|
|
b63792 |
add @x[14],@x[14],@x[15],lsl#32
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev @x[0],@x[0]
|
|
|
b63792 |
rev @x[2],@x[2]
|
|
|
b63792 |
rev @x[4],@x[4]
|
|
|
b63792 |
@@ -340,46 +347,91 @@ $code.=<<___;
|
|
|
b63792 |
___
|
|
|
b63792 |
|
|
|
b63792 |
{{{
|
|
|
b63792 |
-my ($A0,$B0,$C0,$D0,$A1,$B1,$C1,$D1,$A2,$B2,$C2,$D2,$T0,$T1,$T2,$T3) =
|
|
|
b63792 |
- map("v$_.4s",(0..7,16..23));
|
|
|
b63792 |
-my (@K)=map("v$_.4s",(24..30));
|
|
|
b63792 |
-my $ONE="v31.4s";
|
|
|
b63792 |
+my @K = map("v$_.4s",(0..3));
|
|
|
b63792 |
+my ($xt0,$xt1,$xt2,$xt3, $CTR,$ROT24) = map("v$_.4s",(4..9));
|
|
|
b63792 |
+my @X = map("v$_.4s",(16,20,24,28, 17,21,25,29, 18,22,26,30, 19,23,27,31));
|
|
|
b63792 |
+my ($xa0,$xa1,$xa2,$xa3, $xb0,$xb1,$xb2,$xb3,
|
|
|
b63792 |
+ $xc0,$xc1,$xc2,$xc3, $xd0,$xd1,$xd2,$xd3) = @X;
|
|
|
b63792 |
|
|
|
b63792 |
-sub NEONROUND {
|
|
|
b63792 |
-my $odd = pop;
|
|
|
b63792 |
-my ($a,$b,$c,$d,$t)=@_;
|
|
|
b63792 |
+sub NEON_lane_ROUND {
|
|
|
b63792 |
+my ($a0,$b0,$c0,$d0)=@_;
|
|
|
b63792 |
+my ($a1,$b1,$c1,$d1)=map(($_&~3)+(($_+1)&3),($a0,$b0,$c0,$d0));
|
|
|
b63792 |
+my ($a2,$b2,$c2,$d2)=map(($_&~3)+(($_+1)&3),($a1,$b1,$c1,$d1));
|
|
|
b63792 |
+my ($a3,$b3,$c3,$d3)=map(($_&~3)+(($_+1)&3),($a2,$b2,$c2,$d2));
|
|
|
b63792 |
+my @x=map("'$_'",@X);
|
|
|
b63792 |
|
|
|
b63792 |
(
|
|
|
b63792 |
- "&add ('$a','$a','$b')",
|
|
|
b63792 |
- "&eor ('$d','$d','$a')",
|
|
|
b63792 |
- "&rev32_16 ('$d','$d')", # vrot ($d,16)
|
|
|
b63792 |
-
|
|
|
b63792 |
- "&add ('$c','$c','$d')",
|
|
|
b63792 |
- "&eor ('$t','$b','$c')",
|
|
|
b63792 |
- "&ushr ('$b','$t',20)",
|
|
|
b63792 |
- "&sli ('$b','$t',12)",
|
|
|
b63792 |
-
|
|
|
b63792 |
- "&add ('$a','$a','$b')",
|
|
|
b63792 |
- "&eor ('$t','$d','$a')",
|
|
|
b63792 |
- "&ushr ('$d','$t',24)",
|
|
|
b63792 |
- "&sli ('$d','$t',8)",
|
|
|
b63792 |
-
|
|
|
b63792 |
- "&add ('$c','$c','$d')",
|
|
|
b63792 |
- "&eor ('$t','$b','$c')",
|
|
|
b63792 |
- "&ushr ('$b','$t',25)",
|
|
|
b63792 |
- "&sli ('$b','$t',7)",
|
|
|
b63792 |
-
|
|
|
b63792 |
- "&ext ('$c','$c','$c',8)",
|
|
|
b63792 |
- "&ext ('$d','$d','$d',$odd?4:12)",
|
|
|
b63792 |
- "&ext ('$b','$b','$b',$odd?12:4)"
|
|
|
b63792 |
+ "&add (@x[$a0],@x[$a0],@x[$b0])", # Q1
|
|
|
b63792 |
+ "&add (@x[$a1],@x[$a1],@x[$b1])", # Q2
|
|
|
b63792 |
+ "&add (@x[$a2],@x[$a2],@x[$b2])", # Q3
|
|
|
b63792 |
+ "&add (@x[$a3],@x[$a3],@x[$b3])", # Q4
|
|
|
b63792 |
+ "&eor (@x[$d0],@x[$d0],@x[$a0])",
|
|
|
b63792 |
+ "&eor (@x[$d1],@x[$d1],@x[$a1])",
|
|
|
b63792 |
+ "&eor (@x[$d2],@x[$d2],@x[$a2])",
|
|
|
b63792 |
+ "&eor (@x[$d3],@x[$d3],@x[$a3])",
|
|
|
b63792 |
+ "&rev32_16 (@x[$d0],@x[$d0])",
|
|
|
b63792 |
+ "&rev32_16 (@x[$d1],@x[$d1])",
|
|
|
b63792 |
+ "&rev32_16 (@x[$d2],@x[$d2])",
|
|
|
b63792 |
+ "&rev32_16 (@x[$d3],@x[$d3])",
|
|
|
b63792 |
+
|
|
|
b63792 |
+ "&add (@x[$c0],@x[$c0],@x[$d0])",
|
|
|
b63792 |
+ "&add (@x[$c1],@x[$c1],@x[$d1])",
|
|
|
b63792 |
+ "&add (@x[$c2],@x[$c2],@x[$d2])",
|
|
|
b63792 |
+ "&add (@x[$c3],@x[$c3],@x[$d3])",
|
|
|
b63792 |
+ "&eor ('$xt0',@x[$b0],@x[$c0])",
|
|
|
b63792 |
+ "&eor ('$xt1',@x[$b1],@x[$c1])",
|
|
|
b63792 |
+ "&eor ('$xt2',@x[$b2],@x[$c2])",
|
|
|
b63792 |
+ "&eor ('$xt3',@x[$b3],@x[$c3])",
|
|
|
b63792 |
+ "&ushr (@x[$b0],'$xt0',20)",
|
|
|
b63792 |
+ "&ushr (@x[$b1],'$xt1',20)",
|
|
|
b63792 |
+ "&ushr (@x[$b2],'$xt2',20)",
|
|
|
b63792 |
+ "&ushr (@x[$b3],'$xt3',20)",
|
|
|
b63792 |
+ "&sli (@x[$b0],'$xt0',12)",
|
|
|
b63792 |
+ "&sli (@x[$b1],'$xt1',12)",
|
|
|
b63792 |
+ "&sli (@x[$b2],'$xt2',12)",
|
|
|
b63792 |
+ "&sli (@x[$b3],'$xt3',12)",
|
|
|
b63792 |
+
|
|
|
b63792 |
+ "&add (@x[$a0],@x[$a0],@x[$b0])",
|
|
|
b63792 |
+ "&add (@x[$a1],@x[$a1],@x[$b1])",
|
|
|
b63792 |
+ "&add (@x[$a2],@x[$a2],@x[$b2])",
|
|
|
b63792 |
+ "&add (@x[$a3],@x[$a3],@x[$b3])",
|
|
|
b63792 |
+ "&eor ('$xt0',@x[$d0],@x[$a0])",
|
|
|
b63792 |
+ "&eor ('$xt1',@x[$d1],@x[$a1])",
|
|
|
b63792 |
+ "&eor ('$xt2',@x[$d2],@x[$a2])",
|
|
|
b63792 |
+ "&eor ('$xt3',@x[$d3],@x[$a3])",
|
|
|
b63792 |
+ "&tbl (@x[$d0],'{$xt0}','$ROT24')",
|
|
|
b63792 |
+ "&tbl (@x[$d1],'{$xt1}','$ROT24')",
|
|
|
b63792 |
+ "&tbl (@x[$d2],'{$xt2}','$ROT24')",
|
|
|
b63792 |
+ "&tbl (@x[$d3],'{$xt3}','$ROT24')",
|
|
|
b63792 |
+
|
|
|
b63792 |
+ "&add (@x[$c0],@x[$c0],@x[$d0])",
|
|
|
b63792 |
+ "&add (@x[$c1],@x[$c1],@x[$d1])",
|
|
|
b63792 |
+ "&add (@x[$c2],@x[$c2],@x[$d2])",
|
|
|
b63792 |
+ "&add (@x[$c3],@x[$c3],@x[$d3])",
|
|
|
b63792 |
+ "&eor ('$xt0',@x[$b0],@x[$c0])",
|
|
|
b63792 |
+ "&eor ('$xt1',@x[$b1],@x[$c1])",
|
|
|
b63792 |
+ "&eor ('$xt2',@x[$b2],@x[$c2])",
|
|
|
b63792 |
+ "&eor ('$xt3',@x[$b3],@x[$c3])",
|
|
|
b63792 |
+ "&ushr (@x[$b0],'$xt0',25)",
|
|
|
b63792 |
+ "&ushr (@x[$b1],'$xt1',25)",
|
|
|
b63792 |
+ "&ushr (@x[$b2],'$xt2',25)",
|
|
|
b63792 |
+ "&ushr (@x[$b3],'$xt3',25)",
|
|
|
b63792 |
+ "&sli (@x[$b0],'$xt0',7)",
|
|
|
b63792 |
+ "&sli (@x[$b1],'$xt1',7)",
|
|
|
b63792 |
+ "&sli (@x[$b2],'$xt2',7)",
|
|
|
b63792 |
+ "&sli (@x[$b3],'$xt3',7)"
|
|
|
b63792 |
);
|
|
|
b63792 |
}
|
|
|
b63792 |
|
|
|
b63792 |
$code.=<<___;
|
|
|
b63792 |
|
|
|
b63792 |
+#ifdef __KERNEL__
|
|
|
b63792 |
+.globl ChaCha20_neon
|
|
|
b63792 |
+#endif
|
|
|
b63792 |
.type ChaCha20_neon,%function
|
|
|
b63792 |
.align 5
|
|
|
b63792 |
ChaCha20_neon:
|
|
|
b63792 |
+.LChaCha20_neon:
|
|
|
b63792 |
.inst 0xd503233f // paciasp
|
|
|
b63792 |
stp x29,x30,[sp,#-96]!
|
|
|
b63792 |
add x29,sp,#0
|
|
|
b63792 |
@@ -402,8 +454,9 @@ ChaCha20_neon:
|
|
|
b63792 |
ld1 {@K[1],@K[2]},[$key]
|
|
|
b63792 |
ldp @d[6],@d[7],[$ctr] // load counter
|
|
|
b63792 |
ld1 {@K[3]},[$ctr]
|
|
|
b63792 |
- ld1 {$ONE},[@x[0]]
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+ stp d8,d9,[sp] // meet ABI requirements
|
|
|
b63792 |
+ ld1 {$CTR,$ROT24},[@x[0]]
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev64 @K[0],@K[0]
|
|
|
b63792 |
ror @d[2],@d[2],#32
|
|
|
b63792 |
ror @d[3],@d[3],#32
|
|
|
b63792 |
@@ -412,115 +465,129 @@ ChaCha20_neon:
|
|
|
b63792 |
ror @d[6],@d[6],#32
|
|
|
b63792 |
ror @d[7],@d[7],#32
|
|
|
b63792 |
#endif
|
|
|
b63792 |
- add @K[3],@K[3],$ONE // += 1
|
|
|
b63792 |
- add @K[4],@K[3],$ONE
|
|
|
b63792 |
- add @K[5],@K[4],$ONE
|
|
|
b63792 |
- shl $ONE,$ONE,#2 // 1 -> 4
|
|
|
b63792 |
|
|
|
b63792 |
.Loop_outer_neon:
|
|
|
b63792 |
- mov.32 @x[0],@d[0] // unpack key block
|
|
|
b63792 |
- lsr @x[1],@d[0],#32
|
|
|
b63792 |
- mov $A0,@K[0]
|
|
|
b63792 |
- mov.32 @x[2],@d[1]
|
|
|
b63792 |
- lsr @x[3],@d[1],#32
|
|
|
b63792 |
- mov $A1,@K[0]
|
|
|
b63792 |
- mov.32 @x[4],@d[2]
|
|
|
b63792 |
- lsr @x[5],@d[2],#32
|
|
|
b63792 |
- mov $A2,@K[0]
|
|
|
b63792 |
- mov.32 @x[6],@d[3]
|
|
|
b63792 |
- mov $B0,@K[1]
|
|
|
b63792 |
- lsr @x[7],@d[3],#32
|
|
|
b63792 |
- mov $B1,@K[1]
|
|
|
b63792 |
- mov.32 @x[8],@d[4]
|
|
|
b63792 |
- mov $B2,@K[1]
|
|
|
b63792 |
- lsr @x[9],@d[4],#32
|
|
|
b63792 |
- mov $D0,@K[3]
|
|
|
b63792 |
- mov.32 @x[10],@d[5]
|
|
|
b63792 |
- mov $D1,@K[4]
|
|
|
b63792 |
- lsr @x[11],@d[5],#32
|
|
|
b63792 |
- mov $D2,@K[5]
|
|
|
b63792 |
- mov.32 @x[12],@d[6]
|
|
|
b63792 |
- mov $C0,@K[2]
|
|
|
b63792 |
- lsr @x[13],@d[6],#32
|
|
|
b63792 |
- mov $C1,@K[2]
|
|
|
b63792 |
- mov.32 @x[14],@d[7]
|
|
|
b63792 |
- mov $C2,@K[2]
|
|
|
b63792 |
- lsr @x[15],@d[7],#32
|
|
|
b63792 |
+ dup $xa0,@{K[0]}[0] // unpack key block
|
|
|
b63792 |
+ mov.32 @x[0],@d[0]
|
|
|
b63792 |
+ dup $xa1,@{K[0]}[1]
|
|
|
b63792 |
+ lsr @x[1],@d[0],#32
|
|
|
b63792 |
+ dup $xa2,@{K[0]}[2]
|
|
|
b63792 |
+ mov.32 @x[2],@d[1]
|
|
|
b63792 |
+ dup $xa3,@{K[0]}[3]
|
|
|
b63792 |
+ lsr @x[3],@d[1],#32
|
|
|
b63792 |
+ dup $xb0,@{K[1]}[0]
|
|
|
b63792 |
+ mov.32 @x[4],@d[2]
|
|
|
b63792 |
+ dup $xb1,@{K[1]}[1]
|
|
|
b63792 |
+ lsr @x[5],@d[2],#32
|
|
|
b63792 |
+ dup $xb2,@{K[1]}[2]
|
|
|
b63792 |
+ mov.32 @x[6],@d[3]
|
|
|
b63792 |
+ dup $xb3,@{K[1]}[3]
|
|
|
b63792 |
+ lsr @x[7],@d[3],#32
|
|
|
b63792 |
+ dup $xd0,@{K[3]}[0]
|
|
|
b63792 |
+ mov.32 @x[8],@d[4]
|
|
|
b63792 |
+ dup $xd1,@{K[3]}[1]
|
|
|
b63792 |
+ lsr @x[9],@d[4],#32
|
|
|
b63792 |
+ dup $xd2,@{K[3]}[2]
|
|
|
b63792 |
+ mov.32 @x[10],@d[5]
|
|
|
b63792 |
+ dup $xd3,@{K[3]}[3]
|
|
|
b63792 |
+ lsr @x[11],@d[5],#32
|
|
|
b63792 |
+ add $xd0,$xd0,$CTR
|
|
|
b63792 |
+ mov.32 @x[12],@d[6]
|
|
|
b63792 |
+ dup $xc0,@{K[2]}[0]
|
|
|
b63792 |
+ lsr @x[13],@d[6],#32
|
|
|
b63792 |
+ dup $xc1,@{K[2]}[1]
|
|
|
b63792 |
+ mov.32 @x[14],@d[7]
|
|
|
b63792 |
+ dup $xc2,@{K[2]}[2]
|
|
|
b63792 |
+ lsr @x[15],@d[7],#32
|
|
|
b63792 |
+ dup $xc3,@{K[2]}[3]
|
|
|
b63792 |
|
|
|
b63792 |
mov $ctr,#10
|
|
|
b63792 |
- subs $len,$len,#256
|
|
|
b63792 |
+ subs $len,$len,#320
|
|
|
b63792 |
.Loop_neon:
|
|
|
b63792 |
sub $ctr,$ctr,#1
|
|
|
b63792 |
___
|
|
|
b63792 |
- my @thread0=&NEONROUND($A0,$B0,$C0,$D0,$T0,0);
|
|
|
b63792 |
- my @thread1=&NEONROUND($A1,$B1,$C1,$D1,$T1,0);
|
|
|
b63792 |
- my @thread2=&NEONROUND($A2,$B2,$C2,$D2,$T2,0);
|
|
|
b63792 |
- my @thread3=&ROUND(0,4,8,12);
|
|
|
b63792 |
-
|
|
|
b63792 |
- foreach (@thread0) {
|
|
|
b63792 |
- eval; eval(shift(@thread3));
|
|
|
b63792 |
- eval(shift(@thread1)); eval(shift(@thread3));
|
|
|
b63792 |
- eval(shift(@thread2)); eval(shift(@thread3));
|
|
|
b63792 |
- }
|
|
|
b63792 |
-
|
|
|
b63792 |
- @thread0=&NEONROUND($A0,$B0,$C0,$D0,$T0,1);
|
|
|
b63792 |
- @thread1=&NEONROUND($A1,$B1,$C1,$D1,$T1,1);
|
|
|
b63792 |
- @thread2=&NEONROUND($A2,$B2,$C2,$D2,$T2,1);
|
|
|
b63792 |
- @thread3=&ROUND(0,5,10,15);
|
|
|
b63792 |
+ my @plus_one=&ROUND(0,4,8,12);
|
|
|
b63792 |
+ foreach (&NEON_lane_ROUND(0,4,8,12)) { eval; eval(shift(@plus_one)); }
|
|
|
b63792 |
|
|
|
b63792 |
- foreach (@thread0) {
|
|
|
b63792 |
- eval; eval(shift(@thread3));
|
|
|
b63792 |
- eval(shift(@thread1)); eval(shift(@thread3));
|
|
|
b63792 |
- eval(shift(@thread2)); eval(shift(@thread3));
|
|
|
b63792 |
- }
|
|
|
b63792 |
+ @plus_one=&ROUND(0,5,10,15);
|
|
|
b63792 |
+ foreach (&NEON_lane_ROUND(0,5,10,15)) { eval; eval(shift(@plus_one)); }
|
|
|
b63792 |
$code.=<<___;
|
|
|
b63792 |
cbnz $ctr,.Loop_neon
|
|
|
b63792 |
|
|
|
b63792 |
- add.32 @x[0],@x[0],@d[0] // accumulate key block
|
|
|
b63792 |
- add $A0,$A0,@K[0]
|
|
|
b63792 |
- add @x[1],@x[1],@d[0],lsr#32
|
|
|
b63792 |
- add $A1,$A1,@K[0]
|
|
|
b63792 |
- add.32 @x[2],@x[2],@d[1]
|
|
|
b63792 |
- add $A2,$A2,@K[0]
|
|
|
b63792 |
- add @x[3],@x[3],@d[1],lsr#32
|
|
|
b63792 |
- add $C0,$C0,@K[2]
|
|
|
b63792 |
- add.32 @x[4],@x[4],@d[2]
|
|
|
b63792 |
- add $C1,$C1,@K[2]
|
|
|
b63792 |
- add @x[5],@x[5],@d[2],lsr#32
|
|
|
b63792 |
- add $C2,$C2,@K[2]
|
|
|
b63792 |
- add.32 @x[6],@x[6],@d[3]
|
|
|
b63792 |
- add $D0,$D0,@K[3]
|
|
|
b63792 |
- add @x[7],@x[7],@d[3],lsr#32
|
|
|
b63792 |
- add.32 @x[8],@x[8],@d[4]
|
|
|
b63792 |
- add $D1,$D1,@K[4]
|
|
|
b63792 |
- add @x[9],@x[9],@d[4],lsr#32
|
|
|
b63792 |
- add.32 @x[10],@x[10],@d[5]
|
|
|
b63792 |
- add $D2,$D2,@K[5]
|
|
|
b63792 |
- add @x[11],@x[11],@d[5],lsr#32
|
|
|
b63792 |
- add.32 @x[12],@x[12],@d[6]
|
|
|
b63792 |
- add $B0,$B0,@K[1]
|
|
|
b63792 |
- add @x[13],@x[13],@d[6],lsr#32
|
|
|
b63792 |
- add.32 @x[14],@x[14],@d[7]
|
|
|
b63792 |
- add $B1,$B1,@K[1]
|
|
|
b63792 |
- add @x[15],@x[15],@d[7],lsr#32
|
|
|
b63792 |
- add $B2,$B2,@K[1]
|
|
|
b63792 |
+ add $xd0,$xd0,$CTR
|
|
|
b63792 |
+
|
|
|
b63792 |
+ zip1 $xt0,$xa0,$xa1 // transpose data
|
|
|
b63792 |
+ zip1 $xt1,$xa2,$xa3
|
|
|
b63792 |
+ zip2 $xt2,$xa0,$xa1
|
|
|
b63792 |
+ zip2 $xt3,$xa2,$xa3
|
|
|
b63792 |
+ zip1.64 $xa0,$xt0,$xt1
|
|
|
b63792 |
+ zip2.64 $xa1,$xt0,$xt1
|
|
|
b63792 |
+ zip1.64 $xa2,$xt2,$xt3
|
|
|
b63792 |
+ zip2.64 $xa3,$xt2,$xt3
|
|
|
b63792 |
+
|
|
|
b63792 |
+ zip1 $xt0,$xb0,$xb1
|
|
|
b63792 |
+ zip1 $xt1,$xb2,$xb3
|
|
|
b63792 |
+ zip2 $xt2,$xb0,$xb1
|
|
|
b63792 |
+ zip2 $xt3,$xb2,$xb3
|
|
|
b63792 |
+ zip1.64 $xb0,$xt0,$xt1
|
|
|
b63792 |
+ zip2.64 $xb1,$xt0,$xt1
|
|
|
b63792 |
+ zip1.64 $xb2,$xt2,$xt3
|
|
|
b63792 |
+ zip2.64 $xb3,$xt2,$xt3
|
|
|
b63792 |
+
|
|
|
b63792 |
+ zip1 $xt0,$xc0,$xc1
|
|
|
b63792 |
+ add.32 @x[0],@x[0],@d[0] // accumulate key block
|
|
|
b63792 |
+ zip1 $xt1,$xc2,$xc3
|
|
|
b63792 |
+ add @x[1],@x[1],@d[0],lsr#32
|
|
|
b63792 |
+ zip2 $xt2,$xc0,$xc1
|
|
|
b63792 |
+ add.32 @x[2],@x[2],@d[1]
|
|
|
b63792 |
+ zip2 $xt3,$xc2,$xc3
|
|
|
b63792 |
+ add @x[3],@x[3],@d[1],lsr#32
|
|
|
b63792 |
+ zip1.64 $xc0,$xt0,$xt1
|
|
|
b63792 |
+ add.32 @x[4],@x[4],@d[2]
|
|
|
b63792 |
+ zip2.64 $xc1,$xt0,$xt1
|
|
|
b63792 |
+ add @x[5],@x[5],@d[2],lsr#32
|
|
|
b63792 |
+ zip1.64 $xc2,$xt2,$xt3
|
|
|
b63792 |
+ add.32 @x[6],@x[6],@d[3]
|
|
|
b63792 |
+ zip2.64 $xc3,$xt2,$xt3
|
|
|
b63792 |
+ add @x[7],@x[7],@d[3],lsr#32
|
|
|
b63792 |
+
|
|
|
b63792 |
+ zip1 $xt0,$xd0,$xd1
|
|
|
b63792 |
+ add.32 @x[8],@x[8],@d[4]
|
|
|
b63792 |
+ zip1 $xt1,$xd2,$xd3
|
|
|
b63792 |
+ add @x[9],@x[9],@d[4],lsr#32
|
|
|
b63792 |
+ zip2 $xt2,$xd0,$xd1
|
|
|
b63792 |
+ add.32 @x[10],@x[10],@d[5]
|
|
|
b63792 |
+ zip2 $xt3,$xd2,$xd3
|
|
|
b63792 |
+ add @x[11],@x[11],@d[5],lsr#32
|
|
|
b63792 |
+ zip1.64 $xd0,$xt0,$xt1
|
|
|
b63792 |
+ add.32 @x[12],@x[12],@d[6]
|
|
|
b63792 |
+ zip2.64 $xd1,$xt0,$xt1
|
|
|
b63792 |
+ add @x[13],@x[13],@d[6],lsr#32
|
|
|
b63792 |
+ zip1.64 $xd2,$xt2,$xt3
|
|
|
b63792 |
+ add.32 @x[14],@x[14],@d[7]
|
|
|
b63792 |
+ zip2.64 $xd3,$xt2,$xt3
|
|
|
b63792 |
+ add @x[15],@x[15],@d[7],lsr#32
|
|
|
b63792 |
|
|
|
b63792 |
b.lo .Ltail_neon
|
|
|
b63792 |
|
|
|
b63792 |
add @x[0],@x[0],@x[1],lsl#32 // pack
|
|
|
b63792 |
add @x[2],@x[2],@x[3],lsl#32
|
|
|
b63792 |
ldp @x[1],@x[3],[$inp,#0] // load input
|
|
|
b63792 |
+ add $xa0,$xa0,@K[0] // accumulate key block
|
|
|
b63792 |
add @x[4],@x[4],@x[5],lsl#32
|
|
|
b63792 |
add @x[6],@x[6],@x[7],lsl#32
|
|
|
b63792 |
ldp @x[5],@x[7],[$inp,#16]
|
|
|
b63792 |
+ add $xb0,$xb0,@K[1]
|
|
|
b63792 |
add @x[8],@x[8],@x[9],lsl#32
|
|
|
b63792 |
add @x[10],@x[10],@x[11],lsl#32
|
|
|
b63792 |
ldp @x[9],@x[11],[$inp,#32]
|
|
|
b63792 |
+ add $xc0,$xc0,@K[2]
|
|
|
b63792 |
add @x[12],@x[12],@x[13],lsl#32
|
|
|
b63792 |
add @x[14],@x[14],@x[15],lsl#32
|
|
|
b63792 |
ldp @x[13],@x[15],[$inp,#48]
|
|
|
b63792 |
+ add $xd0,$xd0,@K[3]
|
|
|
b63792 |
add $inp,$inp,#64
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev @x[0],@x[0]
|
|
|
b63792 |
rev @x[2],@x[2]
|
|
|
b63792 |
rev @x[4],@x[4]
|
|
|
b63792 |
@@ -530,48 +597,68 @@ $code.=<<___;
|
|
|
b63792 |
rev @x[12],@x[12]
|
|
|
b63792 |
rev @x[14],@x[14]
|
|
|
b63792 |
#endif
|
|
|
b63792 |
- ld1.8 {$T0-$T3},[$inp],#64
|
|
|
b63792 |
+ ld1.8 {$xt0-$xt3},[$inp],#64
|
|
|
b63792 |
eor @x[0],@x[0],@x[1]
|
|
|
b63792 |
+ add $xa1,$xa1,@K[0]
|
|
|
b63792 |
eor @x[2],@x[2],@x[3]
|
|
|
b63792 |
+ add $xb1,$xb1,@K[1]
|
|
|
b63792 |
eor @x[4],@x[4],@x[5]
|
|
|
b63792 |
+ add $xc1,$xc1,@K[2]
|
|
|
b63792 |
eor @x[6],@x[6],@x[7]
|
|
|
b63792 |
+ add $xd1,$xd1,@K[3]
|
|
|
b63792 |
eor @x[8],@x[8],@x[9]
|
|
|
b63792 |
- eor $A0,$A0,$T0
|
|
|
b63792 |
+ eor $xa0,$xa0,$xt0
|
|
|
b63792 |
+ movi $xt0,#5
|
|
|
b63792 |
eor @x[10],@x[10],@x[11]
|
|
|
b63792 |
- eor $B0,$B0,$T1
|
|
|
b63792 |
+ eor $xb0,$xb0,$xt1
|
|
|
b63792 |
eor @x[12],@x[12],@x[13]
|
|
|
b63792 |
- eor $C0,$C0,$T2
|
|
|
b63792 |
+ eor $xc0,$xc0,$xt2
|
|
|
b63792 |
eor @x[14],@x[14],@x[15]
|
|
|
b63792 |
- eor $D0,$D0,$T3
|
|
|
b63792 |
- ld1.8 {$T0-$T3},[$inp],#64
|
|
|
b63792 |
+ eor $xd0,$xd0,$xt3
|
|
|
b63792 |
+ add $CTR,$CTR,$xt0 // += 5
|
|
|
b63792 |
+ ld1.8 {$xt0-$xt3},[$inp],#64
|
|
|
b63792 |
|
|
|
b63792 |
stp @x[0],@x[2],[$out,#0] // store output
|
|
|
b63792 |
- add @d[6],@d[6],#4 // increment counter
|
|
|
b63792 |
+ add @d[6],@d[6],#5 // increment counter
|
|
|
b63792 |
stp @x[4],@x[6],[$out,#16]
|
|
|
b63792 |
- add @K[3],@K[3],$ONE // += 4
|
|
|
b63792 |
stp @x[8],@x[10],[$out,#32]
|
|
|
b63792 |
- add @K[4],@K[4],$ONE
|
|
|
b63792 |
stp @x[12],@x[14],[$out,#48]
|
|
|
b63792 |
- add @K[5],@K[5],$ONE
|
|
|
b63792 |
add $out,$out,#64
|
|
|
b63792 |
|
|
|
b63792 |
- st1.8 {$A0-$D0},[$out],#64
|
|
|
b63792 |
- ld1.8 {$A0-$D0},[$inp],#64
|
|
|
b63792 |
-
|
|
|
b63792 |
- eor $A1,$A1,$T0
|
|
|
b63792 |
- eor $B1,$B1,$T1
|
|
|
b63792 |
- eor $C1,$C1,$T2
|
|
|
b63792 |
- eor $D1,$D1,$T3
|
|
|
b63792 |
- st1.8 {$A1-$D1},[$out],#64
|
|
|
b63792 |
-
|
|
|
b63792 |
- eor $A2,$A2,$A0
|
|
|
b63792 |
- eor $B2,$B2,$B0
|
|
|
b63792 |
- eor $C2,$C2,$C0
|
|
|
b63792 |
- eor $D2,$D2,$D0
|
|
|
b63792 |
- st1.8 {$A2-$D2},[$out],#64
|
|
|
b63792 |
+ st1.8 {$xa0-$xd0},[$out],#64
|
|
|
b63792 |
+ add $xa2,$xa2,@K[0]
|
|
|
b63792 |
+ add $xb2,$xb2,@K[1]
|
|
|
b63792 |
+ add $xc2,$xc2,@K[2]
|
|
|
b63792 |
+ add $xd2,$xd2,@K[3]
|
|
|
b63792 |
+ ld1.8 {$xa0-$xd0},[$inp],#64
|
|
|
b63792 |
+
|
|
|
b63792 |
+ eor $xa1,$xa1,$xt0
|
|
|
b63792 |
+ eor $xb1,$xb1,$xt1
|
|
|
b63792 |
+ eor $xc1,$xc1,$xt2
|
|
|
b63792 |
+ eor $xd1,$xd1,$xt3
|
|
|
b63792 |
+ st1.8 {$xa1-$xd1},[$out],#64
|
|
|
b63792 |
+ add $xa3,$xa3,@K[0]
|
|
|
b63792 |
+ add $xb3,$xb3,@K[1]
|
|
|
b63792 |
+ add $xc3,$xc3,@K[2]
|
|
|
b63792 |
+ add $xd3,$xd3,@K[3]
|
|
|
b63792 |
+ ld1.8 {$xa1-$xd1},[$inp],#64
|
|
|
b63792 |
+
|
|
|
b63792 |
+ eor $xa2,$xa2,$xa0
|
|
|
b63792 |
+ eor $xb2,$xb2,$xb0
|
|
|
b63792 |
+ eor $xc2,$xc2,$xc0
|
|
|
b63792 |
+ eor $xd2,$xd2,$xd0
|
|
|
b63792 |
+ st1.8 {$xa2-$xd2},[$out],#64
|
|
|
b63792 |
+
|
|
|
b63792 |
+ eor $xa3,$xa3,$xa1
|
|
|
b63792 |
+ eor $xb3,$xb3,$xb1
|
|
|
b63792 |
+ eor $xc3,$xc3,$xc1
|
|
|
b63792 |
+ eor $xd3,$xd3,$xd1
|
|
|
b63792 |
+ st1.8 {$xa3-$xd3},[$out],#64
|
|
|
b63792 |
|
|
|
b63792 |
b.hi .Loop_outer_neon
|
|
|
b63792 |
|
|
|
b63792 |
+ ldp d8,d9,[sp] // meet ABI requirements
|
|
|
b63792 |
+
|
|
|
b63792 |
ldp x19,x20,[x29,#16]
|
|
|
b63792 |
add sp,sp,#64
|
|
|
b63792 |
ldp x21,x22,[x29,#32]
|
|
|
b63792 |
@@ -582,8 +669,10 @@ $code.=<<___;
|
|
|
b63792 |
.inst 0xd50323bf // autiasp
|
|
|
b63792 |
ret
|
|
|
b63792 |
|
|
|
b63792 |
+.align 4
|
|
|
b63792 |
.Ltail_neon:
|
|
|
b63792 |
- add $len,$len,#256
|
|
|
b63792 |
+ add $len,$len,#320
|
|
|
b63792 |
+ ldp d8,d9,[sp] // meet ABI requirements
|
|
|
b63792 |
cmp $len,#64
|
|
|
b63792 |
b.lo .Less_than_64
|
|
|
b63792 |
|
|
|
b63792 |
@@ -600,7 +689,7 @@ $code.=<<___;
|
|
|
b63792 |
add @x[14],@x[14],@x[15],lsl#32
|
|
|
b63792 |
ldp @x[13],@x[15],[$inp,#48]
|
|
|
b63792 |
add $inp,$inp,#64
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev @x[0],@x[0]
|
|
|
b63792 |
rev @x[2],@x[2]
|
|
|
b63792 |
rev @x[4],@x[4]
|
|
|
b63792 |
@@ -620,48 +709,68 @@ $code.=<<___;
|
|
|
b63792 |
eor @x[14],@x[14],@x[15]
|
|
|
b63792 |
|
|
|
b63792 |
stp @x[0],@x[2],[$out,#0] // store output
|
|
|
b63792 |
- add @d[6],@d[6],#4 // increment counter
|
|
|
b63792 |
+ add $xa0,$xa0,@K[0] // accumulate key block
|
|
|
b63792 |
stp @x[4],@x[6],[$out,#16]
|
|
|
b63792 |
+ add $xb0,$xb0,@K[1]
|
|
|
b63792 |
stp @x[8],@x[10],[$out,#32]
|
|
|
b63792 |
+ add $xc0,$xc0,@K[2]
|
|
|
b63792 |
stp @x[12],@x[14],[$out,#48]
|
|
|
b63792 |
+ add $xd0,$xd0,@K[3]
|
|
|
b63792 |
add $out,$out,#64
|
|
|
b63792 |
b.eq .Ldone_neon
|
|
|
b63792 |
sub $len,$len,#64
|
|
|
b63792 |
cmp $len,#64
|
|
|
b63792 |
- b.lo .Less_than_128
|
|
|
b63792 |
+ b.lo .Last_neon
|
|
|
b63792 |
|
|
|
b63792 |
- ld1.8 {$T0-$T3},[$inp],#64
|
|
|
b63792 |
- eor $A0,$A0,$T0
|
|
|
b63792 |
- eor $B0,$B0,$T1
|
|
|
b63792 |
- eor $C0,$C0,$T2
|
|
|
b63792 |
- eor $D0,$D0,$T3
|
|
|
b63792 |
- st1.8 {$A0-$D0},[$out],#64
|
|
|
b63792 |
+ ld1.8 {$xt0-$xt3},[$inp],#64
|
|
|
b63792 |
+ eor $xa0,$xa0,$xt0
|
|
|
b63792 |
+ eor $xb0,$xb0,$xt1
|
|
|
b63792 |
+ eor $xc0,$xc0,$xt2
|
|
|
b63792 |
+ eor $xd0,$xd0,$xt3
|
|
|
b63792 |
+ st1.8 {$xa0-$xd0},[$out],#64
|
|
|
b63792 |
b.eq .Ldone_neon
|
|
|
b63792 |
+
|
|
|
b63792 |
+ add $xa0,$xa1,@K[0]
|
|
|
b63792 |
+ add $xb0,$xb1,@K[1]
|
|
|
b63792 |
sub $len,$len,#64
|
|
|
b63792 |
+ add $xc0,$xc1,@K[2]
|
|
|
b63792 |
cmp $len,#64
|
|
|
b63792 |
- b.lo .Less_than_192
|
|
|
b63792 |
+ add $xd0,$xd1,@K[3]
|
|
|
b63792 |
+ b.lo .Last_neon
|
|
|
b63792 |
|
|
|
b63792 |
- ld1.8 {$T0-$T3},[$inp],#64
|
|
|
b63792 |
- eor $A1,$A1,$T0
|
|
|
b63792 |
- eor $B1,$B1,$T1
|
|
|
b63792 |
- eor $C1,$C1,$T2
|
|
|
b63792 |
- eor $D1,$D1,$T3
|
|
|
b63792 |
- st1.8 {$A1-$D1},[$out],#64
|
|
|
b63792 |
+ ld1.8 {$xt0-$xt3},[$inp],#64
|
|
|
b63792 |
+ eor $xa1,$xa0,$xt0
|
|
|
b63792 |
+ eor $xb1,$xb0,$xt1
|
|
|
b63792 |
+ eor $xc1,$xc0,$xt2
|
|
|
b63792 |
+ eor $xd1,$xd0,$xt3
|
|
|
b63792 |
+ st1.8 {$xa1-$xd1},[$out],#64
|
|
|
b63792 |
b.eq .Ldone_neon
|
|
|
b63792 |
+
|
|
|
b63792 |
+ add $xa0,$xa2,@K[0]
|
|
|
b63792 |
+ add $xb0,$xb2,@K[1]
|
|
|
b63792 |
sub $len,$len,#64
|
|
|
b63792 |
+ add $xc0,$xc2,@K[2]
|
|
|
b63792 |
+ cmp $len,#64
|
|
|
b63792 |
+ add $xd0,$xd2,@K[3]
|
|
|
b63792 |
+ b.lo .Last_neon
|
|
|
b63792 |
|
|
|
b63792 |
- st1.8 {$A2-$D2},[sp]
|
|
|
b63792 |
- b .Last_neon
|
|
|
b63792 |
+ ld1.8 {$xt0-$xt3},[$inp],#64
|
|
|
b63792 |
+ eor $xa2,$xa0,$xt0
|
|
|
b63792 |
+ eor $xb2,$xb0,$xt1
|
|
|
b63792 |
+ eor $xc2,$xc0,$xt2
|
|
|
b63792 |
+ eor $xd2,$xd0,$xt3
|
|
|
b63792 |
+ st1.8 {$xa2-$xd2},[$out],#64
|
|
|
b63792 |
+ b.eq .Ldone_neon
|
|
|
b63792 |
|
|
|
b63792 |
-.Less_than_128:
|
|
|
b63792 |
- st1.8 {$A0-$D0},[sp]
|
|
|
b63792 |
- b .Last_neon
|
|
|
b63792 |
-.Less_than_192:
|
|
|
b63792 |
- st1.8 {$A1-$D1},[sp]
|
|
|
b63792 |
- b .Last_neon
|
|
|
b63792 |
+ add $xa0,$xa3,@K[0]
|
|
|
b63792 |
+ add $xb0,$xb3,@K[1]
|
|
|
b63792 |
+ add $xc0,$xc3,@K[2]
|
|
|
b63792 |
+ add $xd0,$xd3,@K[3]
|
|
|
b63792 |
+ sub $len,$len,#64
|
|
|
b63792 |
|
|
|
b63792 |
-.align 4
|
|
|
b63792 |
.Last_neon:
|
|
|
b63792 |
+ st1.8 {$xa0-$xd0},[sp]
|
|
|
b63792 |
+
|
|
|
b63792 |
sub $out,$out,#1
|
|
|
b63792 |
add $inp,$inp,$len
|
|
|
b63792 |
add $out,$out,$len
|
|
|
b63792 |
@@ -694,9 +803,41 @@ $code.=<<___;
|
|
|
b63792 |
.size ChaCha20_neon,.-ChaCha20_neon
|
|
|
b63792 |
___
|
|
|
b63792 |
{
|
|
|
b63792 |
+my @K = map("v$_.4s",(0..6));
|
|
|
b63792 |
my ($T0,$T1,$T2,$T3,$T4,$T5)=@K;
|
|
|
b63792 |
my ($A0,$B0,$C0,$D0,$A1,$B1,$C1,$D1,$A2,$B2,$C2,$D2,
|
|
|
b63792 |
- $A3,$B3,$C3,$D3,$A4,$B4,$C4,$D4,$A5,$B5,$C5,$D5) = map("v$_.4s",(0..23));
|
|
|
b63792 |
+ $A3,$B3,$C3,$D3,$A4,$B4,$C4,$D4,$A5,$B5,$C5,$D5) = map("v$_.4s",(8..31));
|
|
|
b63792 |
+my $rot24 = @K[6];
|
|
|
b63792 |
+my $ONE = "v7.4s";
|
|
|
b63792 |
+
|
|
|
b63792 |
+sub NEONROUND {
|
|
|
b63792 |
+my $odd = pop;
|
|
|
b63792 |
+my ($a,$b,$c,$d,$t)=@_;
|
|
|
b63792 |
+
|
|
|
b63792 |
+ (
|
|
|
b63792 |
+ "&add ('$a','$a','$b')",
|
|
|
b63792 |
+ "&eor ('$d','$d','$a')",
|
|
|
b63792 |
+ "&rev32_16 ('$d','$d')", # vrot ($d,16)
|
|
|
b63792 |
+
|
|
|
b63792 |
+ "&add ('$c','$c','$d')",
|
|
|
b63792 |
+ "&eor ('$t','$b','$c')",
|
|
|
b63792 |
+ "&ushr ('$b','$t',20)",
|
|
|
b63792 |
+ "&sli ('$b','$t',12)",
|
|
|
b63792 |
+
|
|
|
b63792 |
+ "&add ('$a','$a','$b')",
|
|
|
b63792 |
+ "&eor ('$d','$d','$a')",
|
|
|
b63792 |
+ "&tbl ('$d','{$d}','$rot24')",
|
|
|
b63792 |
+
|
|
|
b63792 |
+ "&add ('$c','$c','$d')",
|
|
|
b63792 |
+ "&eor ('$t','$b','$c')",
|
|
|
b63792 |
+ "&ushr ('$b','$t',25)",
|
|
|
b63792 |
+ "&sli ('$b','$t',7)",
|
|
|
b63792 |
+
|
|
|
b63792 |
+ "&ext ('$c','$c','$c',8)",
|
|
|
b63792 |
+ "&ext ('$d','$d','$d',$odd?4:12)",
|
|
|
b63792 |
+ "&ext ('$b','$b','$b',$odd?12:4)"
|
|
|
b63792 |
+ );
|
|
|
b63792 |
+}
|
|
|
b63792 |
|
|
|
b63792 |
$code.=<<___;
|
|
|
b63792 |
.type ChaCha20_512_neon,%function
|
|
|
b63792 |
@@ -716,6 +857,7 @@ ChaCha20_512_neon:
|
|
|
b63792 |
.L512_or_more_neon:
|
|
|
b63792 |
sub sp,sp,#128+64
|
|
|
b63792 |
|
|
|
b63792 |
+ eor $ONE,$ONE,$ONE
|
|
|
b63792 |
ldp @d[0],@d[1],[@x[0]] // load sigma
|
|
|
b63792 |
ld1 {@K[0]},[@x[0]],#16
|
|
|
b63792 |
ldp @d[2],@d[3],[$key] // load key
|
|
|
b63792 |
@@ -723,8 +865,9 @@ ChaCha20_512_neon:
|
|
|
b63792 |
ld1 {@K[1],@K[2]},[$key]
|
|
|
b63792 |
ldp @d[6],@d[7],[$ctr] // load counter
|
|
|
b63792 |
ld1 {@K[3]},[$ctr]
|
|
|
b63792 |
- ld1 {$ONE},[@x[0]]
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+ ld1 {$ONE}[0],[@x[0]]
|
|
|
b63792 |
+ add $key,@x[0],#16 // .Lrot24
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev64 @K[0],@K[0]
|
|
|
b63792 |
ror @d[2],@d[2],#32
|
|
|
b63792 |
ror @d[3],@d[3],#32
|
|
|
b63792 |
@@ -791,9 +934,10 @@ ChaCha20_512_neon:
|
|
|
b63792 |
mov $C4,@K[2]
|
|
|
b63792 |
stp @K[3],@K[4],[sp,#48] // off-load key block, variable part
|
|
|
b63792 |
mov $C5,@K[2]
|
|
|
b63792 |
- str @K[5],[sp,#80]
|
|
|
b63792 |
+ stp @K[5],@K[6],[sp,#80]
|
|
|
b63792 |
|
|
|
b63792 |
mov $ctr,#5
|
|
|
b63792 |
+ ld1 {$rot24},[$key]
|
|
|
b63792 |
subs $len,$len,#512
|
|
|
b63792 |
.Loop_upper_neon:
|
|
|
b63792 |
sub $ctr,$ctr,#1
|
|
|
b63792 |
@@ -866,7 +1010,7 @@ $code.=<<___;
|
|
|
b63792 |
add @x[14],@x[14],@x[15],lsl#32
|
|
|
b63792 |
ldp @x[13],@x[15],[$inp,#48]
|
|
|
b63792 |
add $inp,$inp,#64
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev @x[0],@x[0]
|
|
|
b63792 |
rev @x[2],@x[2]
|
|
|
b63792 |
rev @x[4],@x[4]
|
|
|
b63792 |
@@ -955,6 +1099,7 @@ $code.=<<___;
|
|
|
b63792 |
add.32 @x[2],@x[2],@d[1]
|
|
|
b63792 |
ldp @K[4],@K[5],[sp,#64]
|
|
|
b63792 |
add @x[3],@x[3],@d[1],lsr#32
|
|
|
b63792 |
+ ldr @K[6],[sp,#96]
|
|
|
b63792 |
add $A0,$A0,@K[0]
|
|
|
b63792 |
add.32 @x[4],@x[4],@d[2]
|
|
|
b63792 |
add $A1,$A1,@K[0]
|
|
|
b63792 |
@@ -1007,7 +1152,7 @@ $code.=<<___;
|
|
|
b63792 |
add $inp,$inp,#64
|
|
|
b63792 |
add $B5,$B5,@K[1]
|
|
|
b63792 |
|
|
|
b63792 |
-#ifdef __ARMEB__
|
|
|
b63792 |
+#ifdef __AARCH64EB__
|
|
|
b63792 |
rev @x[0],@x[0]
|
|
|
b63792 |
rev @x[2],@x[2]
|
|
|
b63792 |
rev @x[4],@x[4]
|
|
|
b63792 |
@@ -1085,26 +1230,26 @@ $code.=<<___;
|
|
|
b63792 |
b.hs .Loop_outer_512_neon
|
|
|
b63792 |
|
|
|
b63792 |
adds $len,$len,#512
|
|
|
b63792 |
- ushr $A0,$ONE,#2 // 4 -> 1
|
|
|
b63792 |
+ ushr $ONE,$ONE,#1 // 4 -> 2
|
|
|
b63792 |
|
|
|
b63792 |
- ldp d8,d9,[sp,#128+0] // meet ABI requirements
|
|
|
b63792 |
ldp d10,d11,[sp,#128+16]
|
|
|
b63792 |
ldp d12,d13,[sp,#128+32]
|
|
|
b63792 |
ldp d14,d15,[sp,#128+48]
|
|
|
b63792 |
|
|
|
b63792 |
- stp @K[0],$ONE,[sp,#0] // wipe off-load area
|
|
|
b63792 |
- stp @K[0],$ONE,[sp,#32]
|
|
|
b63792 |
- stp @K[0],$ONE,[sp,#64]
|
|
|
b63792 |
+ stp @K[0],@K[0],[sp,#0] // wipe off-load area
|
|
|
b63792 |
+ stp @K[0],@K[0],[sp,#32]
|
|
|
b63792 |
+ stp @K[0],@K[0],[sp,#64]
|
|
|
b63792 |
|
|
|
b63792 |
b.eq .Ldone_512_neon
|
|
|
b63792 |
|
|
|
b63792 |
+ sub $key,$key,#16 // .Lone
|
|
|
b63792 |
cmp $len,#192
|
|
|
b63792 |
- sub @K[3],@K[3],$A0 // -= 1
|
|
|
b63792 |
- sub @K[4],@K[4],$A0
|
|
|
b63792 |
- sub @K[5],@K[5],$A0
|
|
|
b63792 |
add sp,sp,#128
|
|
|
b63792 |
+ sub @K[3],@K[3],$ONE // -= 2
|
|
|
b63792 |
+ ld1 {$CTR,$ROT24},[$key]
|
|
|
b63792 |
b.hs .Loop_outer_neon
|
|
|
b63792 |
|
|
|
b63792 |
+ ldp d8,d9,[sp,#0] // meet ABI requirements
|
|
|
b63792 |
eor @K[1],@K[1],@K[1]
|
|
|
b63792 |
eor @K[2],@K[2],@K[2]
|
|
|
b63792 |
eor @K[3],@K[3],@K[3]
|
|
|
b63792 |
@@ -1114,6 +1259,7 @@ $code.=<<___;
|
|
|
b63792 |
b .Loop_outer
|
|
|
b63792 |
|
|
|
b63792 |
.Ldone_512_neon:
|
|
|
b63792 |
+ ldp d8,d9,[sp,#128+0] // meet ABI requirements
|
|
|
b63792 |
ldp x19,x20,[x29,#16]
|
|
|
b63792 |
add sp,sp,#128+64
|
|
|
b63792 |
ldp x21,x22,[x29,#32]
|
|
|
b63792 |
@@ -1132,9 +1278,11 @@ foreach (split("\n",$code)) {
|
|
|
b63792 |
s/\`([^\`]*)\`/eval $1/geo;
|
|
|
b63792 |
|
|
|
b63792 |
(s/\b([a-z]+)\.32\b/$1/ and (s/x([0-9]+)/w$1/g or 1)) or
|
|
|
b63792 |
- (m/\b(eor|ext|mov)\b/ and (s/\.4s/\.16b/g or 1)) or
|
|
|
b63792 |
+ (m/\b(eor|ext|mov|tbl)\b/ and (s/\.4s/\.16b/g or 1)) or
|
|
|
b63792 |
(s/\b((?:ld|st)1)\.8\b/$1/ and (s/\.4s/\.16b/g or 1)) or
|
|
|
b63792 |
(m/\b(ld|st)[rp]\b/ and (s/v([0-9]+)\.4s/q$1/g or 1)) or
|
|
|
b63792 |
+ (m/\b(dup|ld1)\b/ and (s/\.4(s}?\[[0-3]\])/.$1/g or 1)) or
|
|
|
b63792 |
+ (s/\b(zip[12])\.64\b/$1/ and (s/\.4s/\.2d/g or 1)) or
|
|
|
b63792 |
(s/\brev32\.16\b/rev32/ and (s/\.4s/\.8h/g or 1));
|
|
|
b63792 |
|
|
|
b63792 |
#s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo;
|
|
|
b63792 |
diff -up openssl-1.1.1c/crypto/modes/asm/ghashv8-armx.pl.arm-update openssl-1.1.1c/crypto/modes/asm/ghashv8-armx.pl
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b63792 |
--- openssl-1.1.1c/crypto/modes/asm/ghashv8-armx.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
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+++ openssl-1.1.1c/crypto/modes/asm/ghashv8-armx.pl 2019-11-20 11:36:22.389506155 +0100
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@@ -42,6 +42,7 @@
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# Denver 0.51 0.65 6.02
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# Mongoose 0.65 1.10 8.06
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# Kryo 0.76 1.16 8.00
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+# ThunderX2 1.05
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#
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b63792 |
# (*) presented for reference/comparison purposes;
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b63792 |
diff -up openssl-1.1.1c/crypto/poly1305/asm/poly1305-armv8.pl.arm-update openssl-1.1.1c/crypto/poly1305/asm/poly1305-armv8.pl
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b63792 |
--- openssl-1.1.1c/crypto/poly1305/asm/poly1305-armv8.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
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b63792 |
+++ openssl-1.1.1c/crypto/poly1305/asm/poly1305-armv8.pl 2019-11-20 11:36:22.390506137 +0100
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b63792 |
@@ -29,6 +29,7 @@
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b63792 |
# X-Gene 2.13/+68% 2.27
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b63792 |
# Mongoose 1.77/+75% 1.12
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b63792 |
# Kryo 2.70/+55% 1.13
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+# ThunderX2 1.17/+95% 1.36
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b63792 |
#
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b63792 |
# (*) estimate based on resources availability is less than 1.0,
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b63792 |
# i.e. measured result is worse than expected, presumably binary
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b63792 |
diff -up openssl-1.1.1c/crypto/sha/asm/keccak1600-armv8.pl.arm-update openssl-1.1.1c/crypto/sha/asm/keccak1600-armv8.pl
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b63792 |
--- openssl-1.1.1c/crypto/sha/asm/keccak1600-armv8.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
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b63792 |
+++ openssl-1.1.1c/crypto/sha/asm/keccak1600-armv8.pl 2019-11-20 11:36:22.390506137 +0100
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b63792 |
@@ -51,6 +51,7 @@
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b63792 |
# Kryo 12
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b63792 |
# Denver 7.8
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b63792 |
# Apple A7 7.2
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+# ThunderX2 9.7
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#
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b63792 |
# (*) Corresponds to SHA3-256. No improvement coefficients are listed
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b63792 |
# because they vary too much from compiler to compiler. Newer
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b63792 |
diff -up openssl-1.1.1c/crypto/sha/asm/sha1-armv8.pl.arm-update openssl-1.1.1c/crypto/sha/asm/sha1-armv8.pl
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b63792 |
--- openssl-1.1.1c/crypto/sha/asm/sha1-armv8.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
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b63792 |
+++ openssl-1.1.1c/crypto/sha/asm/sha1-armv8.pl 2019-11-20 11:36:22.390506137 +0100
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b63792 |
@@ -27,6 +27,7 @@
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b63792 |
# X-Gene 8.80 (+200%)
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b63792 |
# Mongoose 2.05 6.50 (+160%)
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b63792 |
# Kryo 1.88 8.00 (+90%)
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b63792 |
+# ThunderX2 2.64 6.36 (+150%)
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b63792 |
#
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b63792 |
# (*) Software results are presented mostly for reference purposes.
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b63792 |
# (**) Keep in mind that Denver relies on binary translation, which
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b63792 |
diff -up openssl-1.1.1c/crypto/sha/asm/sha512-armv8.pl.arm-update openssl-1.1.1c/crypto/sha/asm/sha512-armv8.pl
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b63792 |
--- openssl-1.1.1c/crypto/sha/asm/sha512-armv8.pl.arm-update 2019-05-28 15:12:21.000000000 +0200
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b63792 |
+++ openssl-1.1.1c/crypto/sha/asm/sha512-armv8.pl 2019-11-20 11:36:22.390506137 +0100
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b63792 |
@@ -28,6 +28,7 @@
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b63792 |
# X-Gene 20.0 (+100%) 12.8 (+300%(***))
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b63792 |
# Mongoose 2.36 13.0 (+50%) 8.36 (+33%)
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b63792 |
# Kryo 1.92 17.4 (+30%) 11.2 (+8%)
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b63792 |
+# ThunderX2 2.54 13.2 (+40%) 8.40 (+18%)
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b63792 |
#
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b63792 |
# (*) Software SHA256 results are of lesser relevance, presented
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b63792 |
# mostly for informational purposes.
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