From ef85ab79e7a45d19ca329c6e4cad9881a5a904e9 Mon Sep 17 00:00:00 2001

From: Dan Williams <dan.j.williams@intel.com>

Date: Thu, 28 Apr 2022 15:10:54 -0700

Subject: [PATCH 165/217] cxl/test: Add topology enumeration and hotplug test

Test the re-plug of memdevs, switch ports, root ports, and bus objects.

Link: https://lore.kernel.org/r/165118385401.1676208.9224280236045777443.stgit@dwillia2-desk3.amr.corp.intel.com

Cc: Luis Chamberlain <mcgrof@kernel.org>

Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>

---

 test/common          |  12 ++++

 test/cxl-topology.sh | 166 +++++++++++++++++++++++++++++++++++++++++++

 test/meson.build     |   2 +

 3 files changed, 180 insertions(+)

 create mode 100644 test/cxl-topology.sh

diff --git a/test/common b/test/common

index fb48795..65615cc 100644

--- a/test/common

+++ b/test/common

@@ -27,6 +27,18 @@ if [ -z $DAXCTL ]; then

 	fi

 fi

+# CXL

+if [ -z $CXL ]; then

+	if [ -f "../cxl/cxl" ] && [ -x "../cxl/cxl" ]; then

+		export CXL=../cxl/cxl

+	elif [ -f "./cxl/cxl" ] && [ -x "./cxl/cxl" ]; then

+		export CXL=./cxl/cxl

+	else

+		echo "Couldn't find a cxl binary"

+		exit 1

+	fi

+fi

+

 if [ -z $TEST_PATH ]; then

 	export TEST_PATH=.

 fi

diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh

new file mode 100644

index 0000000..ff11614

--- /dev/null

+++ b/test/cxl-topology.sh

@@ -0,0 +1,166 @@

+#!/bin/bash

+# SPDX-License-Identifier: GPL-2.0

+# Copyright (C) 2022 Intel Corporation. All rights reserved.

+

+. $(dirname $0)/common

+

+rc=1

+

+set -ex

+

+trap 'err $LINENO' ERR

+

+check_prereq "jq"

+

+modprobe -r cxl_test

+modprobe cxl_test

+udevadm settle

+

+# THEORY OF OPERATION: Validate the hard coded assumptions of the

+# cxl_test.ko module that defines its topology in

+# tools/testing/cxl/test/cxl.c. If that model ever changes then the

+# paired update must be made to this test.

+

+# collect cxl_test root device id

+json=$($CXL list -b cxl_test)

+count=$(jq "length" <<< $json)

+((count == 1)) || err "$LINENO"

+root=$(jq -r ".[] | .bus" <<< $json)

+

+

+# validate 2 host bridges under a root port

+port_sort="sort_by(.port | .[4:] | tonumber)"

+json=$($CXL list -b cxl_test -BP)

+count=$(jq ".[] | .[\"ports:$root\"] | length" <<< $json)

+((count == 2)) || err "$LINENO"

+

+bridge[0]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[0].port" <<< $json)

+bridge[1]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[1].port" <<< $json)

+

+

+# validate 2 root ports per host bridge

+json=$($CXL list -b cxl_test -T -p ${bridge[0]})

+count=$(jq ".[] | .dports | length" <<< $json)

+((count == 2)) || err "$LINENO"

+

+json=$($CXL list -b cxl_test -T -p ${bridge[1]})

+count=$(jq ".[] | .dports | length" <<< $json)

+((count == 2)) || err "$LINENO"

+

+

+# validate 2 switches per-root port

+json=$($CXL list -b cxl_test -P -p ${bridge[0]})

+count=$(jq ".[] | .[\"ports:${bridge[0]}\"] | length" <<< $json)

+((count == 2)) || err "$LINENO"

+

+switch[0]=$(jq -r ".[] | .[\"ports:${bridge[0]}\"] | $port_sort | .[0].host" <<< $json)

+switch[1]=$(jq -r ".[] | .[\"ports:${bridge[0]}\"] | $port_sort | .[1].host" <<< $json)

+

+json=$($CXL list -b cxl_test -P -p ${bridge[1]})

+count=$(jq ".[] | .[\"ports:${bridge[1]}\"] | length" <<< $json)

+((count == 2)) || err "$LINENO"

+

+switch[2]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[0].host" <<< $json)

+switch[3]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[1].host" <<< $json)

+

+

+# check that all 8 cxl_test memdevs are enabled by default and have a

+# pmem size of 256M

+json=$($CXL list -b cxl_test -M)

+count=$(jq "map(select(.pmem_size == $((256 << 20)))) | length" <<< $json)

+((count == 8)) || err "$LINENO"

+

+

+# validate the expected properties of the 4 root decoders

+json=$($CXL list -b cxl_test -D -d root)

+port_id=${root:4}

+port_id_len=${#port_id}

+decoder_sort="sort_by(.decoder | .[$((8+port_id_len)):] | tonumber)"

+count=$(jq "[ $decoder_sort | .[0] |

+	select(.volatile_capable == true) |

+	select(.size == $((256 << 20))) |

+	select(.nr_targets == 1) ] | length" <<< $json)

+((count == 1)) || err "$LINENO"

+

+count=$(jq "[ $decoder_sort | .[1] |

+	select(.volatile_capable == true) |

+	select(.size == $((512 << 20))) |

+	select(.nr_targets == 2) ] | length" <<< $json)

+((count == 1)) || err "$LINENO"

+

+count=$(jq "[ $decoder_sort | .[2] |

+	select(.pmem_capable == true) |

+	select(.size == $((256 << 20))) |

+	select(.nr_targets == 1) ] | length" <<< $json)

+((count == 1)) || err "$LINENO"

+

+count=$(jq "[ $decoder_sort | .[3] |

+	select(.pmem_capable == true) |

+	select(.size == $((512 << 20))) |

+	select(.nr_targets == 2) ] | length" <<< $json)

+((count == 1)) || err "$LINENO"

+

+# check that switch ports disappear after all of their memdevs have been

+# disabled, and return when the memdevs are enabled.

+for s in ${switch[@]}

+do

+	json=$($CXL list -M -p $s)

+	count=$(jq "length" <<< $json)

+	((count == 2)) || err "$LINENO"

+

+	mem[0]=$(jq -r ".[0] | .memdev" <<< $json)

+	mem[1]=$(jq -r ".[1] | .memdev" <<< $json)

+

+	$CXL disable-memdev ${mem[0]} --force

+	json=$($CXL list -p $s)

+	count=$(jq "length" <<< $json)

+	((count == 1)) || err "$LINENO"

+

+	$CXL disable-memdev ${mem[1]} --force

+	json=$($CXL list -p $s)

+	count=$(jq "length" <<< $json)

+	((count == 0)) || err "$LINENO"

+

+	$CXL enable-memdev ${mem[0]}

+	$CXL enable-memdev ${mem[1]}

+

+	json=$($CXL list -p $s)

+	count=$(jq "length" <<< $json)

+	((count == 1)) || err "$LINENO"

+

+	$CXL disable-port $s --force

+	json=$($CXL list -p $s)

+	count=$(jq "length" <<< $json)

+	((count == 0)) || err "$LINENO"

+

+	$CXL enable-memdev ${mem[0]} ${mem[1]}

+	json=$($CXL list -p $s)

+	count=$(jq "length" <<< $json)

+	((count == 1)) || err "$LINENO"

+done

+

+

+# validate host bridge tear down

+for b in ${bridge[@]}

+do

+	$CXL disable-port $b -f

+	json=$($CXL list -M -i -p $b)

+	count=$(jq "map(select(.state == \"disabled\")) | length" <<< $json)

+	((count == 4)) || err "$LINENO"

+

+	$CXL enable-port $b -m

+	json=$($CXL list -M -p $b)

+	count=$(jq "length" <<< $json)

+	((count == 4)) || err "$LINENO"

+done

+

+

+# validate that the bus can be disabled without issue

+$CXL disable-bus $root -f

+

+

+# validate no WARN or lockdep report during the run

+log=$(journalctl -r -k --since "-$((SECONDS+1))s")

+grep -q "Call Trace" <<< $log && err "$LINENO"

+

+modprobe -r cxl_test

diff --git a/test/meson.build b/test/meson.build

index 7ccd451..210dcb0 100644

--- a/test/meson.build

+++ b/test/meson.build

@@ -150,6 +150,7 @@ monitor = find_program('monitor.sh')

 max_extent = find_program('max_available_extent_ns.sh')

 pfn_meta_errors = find_program('pfn-meta-errors.sh')

 track_uuid = find_program('track-uuid.sh')

+cxl_topo = find_program('cxl-topology.sh')

 tests = [

   [ 'libndctl',               libndctl,		  'ndctl' ],

@@ -174,6 +175,7 @@ tests = [

   [ 'max_extent_ns',          max_extent,	  'ndctl' ],

   [ 'pfn-meta-errors.sh',     pfn_meta_errors,	  'ndctl' ],

   [ 'track-uuid.sh',          track_uuid,	  'ndctl' ],

+  [ 'cxl-topology.sh',	      cxl_topo,		  'cxl'   ],

 ]

 if get_option('destructive').enabled()

-- 

2.27.0